Searched refs:jz4740_clock_divided_clks (Results 1 - 1 of 1) sorted by relevance

/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/mips/jz4740/
H A Dclock.c601 static struct divided_clk jz4740_clock_divided_clks[] = { variable in typeref:struct:divided_clk
839 for (i = 0; i < ARRAY_SIZE(jz4740_clock_divided_clks); ++i)
840 clk_add(&jz4740_clock_divided_clks[i].clk);
908 jz4740_clock_divided_clks[1].clk.parent = &jz_clk_pll_half;
913 jz4740_clock_divided_clks[0].clk.parent = &jz_clk_pll_half;

Completed in 13 milliseconds