Searched refs:itir (Results 1 - 18 of 18) sorted by relevance

/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/ia64/kvm/
H A Dvtlb.c160 static void vhpt_insert(u64 pte, u64 itir, u64 ifa, u64 gpte) argument
166 ps = itir_ps(itir);
176 head->itir = rr.ps << 2;
199 void thash_vhpt_insert(struct kvm_vcpu *v, u64 pte, u64 itir, u64 va, int type) argument
205 phy_pte = translate_phy_pte(&pte, itir, va);
207 if (itir_ps(itir) >= mrr.ps) {
208 vhpt_insert(phy_pte, itir, va, pte);
212 ia64_itc(type, va, phy_pte, itir_ps(itir));
218 mark_pages_dirty(v, pte, itir_ps(itir));
244 data->itir, ih
329 vtlb_insert(struct kvm_vcpu *v, u64 pte, u64 itir, u64 va) argument
393 translate_phy_pte(u64 *pte, u64 itir, u64 va) argument
419 thash_purge_and_insert(struct kvm_vcpu *v, u64 pte, u64 itir, u64 ifa, int type) argument
[all...]
H A Dvcpu.c1171 void vcpu_itc_i(struct kvm_vcpu *vcpu, u64 pte, u64 itir, u64 ifa) argument
1173 thash_purge_and_insert(vcpu, pte, itir, ifa, I_TLB);
1176 void vcpu_itc_d(struct kvm_vcpu *vcpu, u64 pte, u64 itir, u64 ifa) argument
1178 thash_purge_and_insert(vcpu, pte, itir, ifa, D_TLB);
1181 void vcpu_itr_i(struct kvm_vcpu *vcpu, u64 slot, u64 pte, u64 itir, u64 ifa) argument
1186 ps = itir_ps(itir);
1192 vcpu_set_tr(p_itr, pte, itir, va, rid);
1197 void vcpu_itr_d(struct kvm_vcpu *vcpu, u64 slot, u64 pte, u64 itir, u64 ifa) argument
1203 ps = itir_ps(itir);
1216 pte, itir, v
1287 unsigned long ifa, itir; local
1296 unsigned long ifa, itir; local
1305 unsigned long ifa, itir; local
1314 unsigned long ifa, itir; local
1323 unsigned long ifa, itir; local
1332 unsigned long itir, ifa, pte, slot; local
1345 unsigned long itir, ifa, pte, slot; local
1356 unsigned long itir, ifa, pte; local
1366 unsigned long itir, ifa, pte; local
[all...]
H A Dvcpu.h307 static inline void vcpu_set_tr(struct thash_data *trp, u64 pte, u64 itir, argument
311 trp->itir = itir;
452 static inline unsigned long itir_ps(unsigned long itir) argument
454 return ((itir >> 2) & 0x3f);
464 return ((u64)VCPU(vcpu, itir));
469 VCPU(vcpu, itir) = val;
704 u64 itir, u64 va, int type);
709 extern u64 translate_phy_pte(u64 *pte, u64 itir, u64 va);
711 u64 itir, u6
[all...]
H A Dvti.h140 unsigned long itir; member in struct:vpd::__anon9571::__anon9572
H A Dprocess.c792 u64 vhpt_adr, gppa, pteval, rr, itir; local
829 thash_vhpt_insert(v, data->page_flags, data->itir, vadr, type);
838 itir = rr & (RR_RID_MASK | RR_PS_MASK);
864 thash_purge_and_insert(v, pteval, itir,
902 itir = rr & (RR_RID_MASK | RR_PS_MASK);
903 thash_purge_and_insert(v, pteval, itir,
H A Dvmm_ivt.S156 mov cr.itir=r20
179 mov cr.itir=r20
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/ia64/include/asm/
H A Dkvm.h134 unsigned long itir; member in union:thash_data::__anon9246
183 unsigned long itir; member in struct:saved_vpd::__anon9252::__anon9253
H A Dmca.h100 unsigned long itir; member in struct:ia64_sal_os_state
H A Dtlb.h69 u64 itir; member in struct:ia64_tr_entry
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/ia64/mm/
H A Dtlb.c403 tr_log_size = (p->itir & 0xff) >> 2;
501 p->itir = log_size << 2;
510 p->itir = log_size << 2;
539 if ((p->pte&0x1) && is_tr_overlap(p, p->ifa, p->itir>>2)) {
541 ia64_ptr(0x1, p->ifa, p->itir>>2);
548 if ((p->pte & 0x1) && is_tr_overlap(p, p->ifa, p->itir>>2)) {
550 ia64_ptr(0x2, p->ifa, p->itir>>2);
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/ia64/include/asm/native/
H A Dinst.h55 mov reg = cr.itir
90 (pred) mov cr.itir = reg \
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/ia64/include/asm/xen/
H A Dinterface.h164 unsigned long itir; member in struct:mapped_regs::__anon9482::__anon9483
348 unsigned long key; /* A protection key for itir.*/
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/ia64/kernel/
H A Dmca_asm.S171 mov cr.itir=r18
198 mov cr.itir=r19
218 mov cr.itir=r19
494 mov r12=cr.itir
496 st8 [temp1]=r12,16 // cr.itir
835 ld8 temp3=[temp1],16 // cr.itir
838 mov cr.itir=temp3
867 mov r18=IA64_GRANULE_SHIFT<<2 // for cr.itir.ps
882 mov cr.itir=r18
1042 mov r18=IA64_GRANULE_SHIFT<<2 // for cr.itir
[all...]
H A Dparavirt.c451 __DEFINE_GET_CR(ITIR, itir)
534 __DEFINE_SET_CR(ITIR, itir)
730 IA64_NATIVE_PATCH_DEFINE_CR(itir, itir);
842 IA64_NATIVE_PATCH_BUNDLE_ELEM_CR(itir, ITIR),
H A Dmca.c1232 ia64_ptr(iord, p->ifa, p->itir >> 2);
1235 ia64_itr(0x1, i, p->ifa, p->pte, p->itir >> 2);
1239 ia64_itr(0x2, i, p->ifa, p->pte, p->itir >> 2);
H A Dasm-offsets.c312 DEFINE_MAPPED_REG_OFS(XSI_ITIR_OFS, itir);
H A Dtraps.c428 unsigned long iim, unsigned long itir, long arg5, long arg6,
427 ia64_fault(unsigned long vector, unsigned long isr, unsigned long ifa, unsigned long iim, unsigned long itir, long arg5, long arg6, long arg7, struct pt_regs regs) argument
H A Dhead.S241 mov cr.itir=r18
333 mov cr.itir=r17

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