Searched refs:dst_info (Results 1 - 4 of 4) sorted by relevance
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/mach-ux500/ |
H A D | devices-db8500.c | 145 .dst_info.endianess = STEDMA40_LITTLE_ENDIAN, 146 .dst_info.data_width = STEDMA40_BYTE_WIDTH, 147 .dst_info.psize = STEDMA40_PSIZE_PHY_1, 148 .dst_info.flow_ctrl = STEDMA40_NO_FLOW_CTRL, 163 .dst_info.endianess = STEDMA40_LITTLE_ENDIAN, 164 .dst_info.data_width = STEDMA40_BYTE_WIDTH, 165 .dst_info.psize = STEDMA40_PSIZE_LOG_1, 166 .dst_info.flow_ctrl = STEDMA40_NO_FLOW_CTRL,
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/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/dma/ |
H A D | ste_dma40_ll.c | 44 l3 |= cfg->dst_info.psize << D40_MEM_LCSP3_DCFG_PSIZE_POS; 45 l3 |= cfg->dst_info.data_width << D40_MEM_LCSP3_DCFG_ESIZE_POS; 84 if (cfg->dst_info.flow_ctrl == STEDMA40_NO_FLOW_CTRL) 101 if (cfg->dst_info.psize != STEDMA40_PSIZE_PHY_1) { 103 dst |= cfg->dst_info.psize << D40_SREG_CFG_PSIZE_POS; 108 dst |= cfg->dst_info.data_width << D40_SREG_CFG_ESIZE_POS; 122 dst |= cfg->dst_info.endianess << D40_SREG_CFG_LBE_POS;
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H A D | ste_dma40.c | 1433 return num_elt * (1 << d40c->dma_cfg.dst_info.data_width); 1585 d40c->dma_cfg.dst_info.data_width, 1617 d40c->dma_cfg.dst_info.data_width, 1618 d40c->dma_cfg.dst_info.psize, 1808 d40c->dma_cfg.dst_info.data_width, 1834 d40c->dma_cfg.dst_info.psize, 1838 d40c->dma_cfg.dst_info.data_width, 1910 d40c->dma_cfg.dst_info.data_width, 1975 d40c->dma_cfg.dst_info.data_width, 1976 d40c->dma_cfg.dst_info [all...] |
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/plat-nomadik/include/plat/ |
H A D | ste_dma40.h | 116 * @dst_info: Parameters for dst half channel 133 struct stedma40_half_channel_info dst_info; member in struct:stedma40_chan_cfg
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