Searched refs:div (Results 1 - 25 of 363) sorted by relevance

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/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/mach-omap2/
H A Dclock_common_data.c23 { .div = 1, .val = 0, .flags = RATE_IN_24XX | RATE_IN_3XXX },
24 { .div = 0 }
28 { .div = 1, .val = 1, .flags = RATE_IN_24XX | RATE_IN_3XXX },
29 { .div = 0 }
33 { .div = 1, .val = 1, .flags = RATE_IN_24XX | RATE_IN_3XXX },
34 { .div = 2, .val = 2, .flags = RATE_IN_24XX | RATE_IN_3XXX },
35 { .div = 3, .val = 3, .flags = RATE_IN_243X | RATE_IN_3XXX },
36 { .div = 4, .val = 4, .flags = RATE_IN_243X | RATE_IN_3XXX },
37 { .div = 0 }
H A Dclkt2xxx_sys.c36 u32 div; local
38 div = __raw_readl(prcm_clksrc_ctrl);
39 div &= OMAP_SYSCLKDIV_MASK;
40 div >>= OMAP_SYSCLKDIV_SHIFT;
42 return div;
H A Dclkt_clksel.c69 for (clkr = clks->rates; clkr->div; clkr++) {
73 if (clkr->div > max_div) {
74 max_div = clkr->div;
136 for (clkr = clks->rates; clkr->div; clkr++) {
144 if (!clkr->div) {
151 return clkr->div;
157 * @div: integer divisor to search for
164 static u32 _divisor_to_clksel(struct clk *clk, u32 div) argument
170 WARN_ON(div == 0);
176 for (clkr = clks->rates; clkr->div; clk
345 u32 div = 0; local
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/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/h8300/include/asm/
H A Dtimer.h11 #define calc_param(cnt, div, rate, limit) \
14 for (div = 0; div < ARRAY_SIZE(divide_rate); div++) { \
15 if (rate[div] == 0) \
17 if ((cnt / rate[div]) > limit) \
20 if (div == ARRAY_SIZE(divide_rate)) \
22 cnt /= divide_rate[div]; \
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/plat-s3c24xx/include/mach/
H A Dpwm-clock.h46 * @div: The divisor to calculate the bit information for.
50 static inline unsigned long pwm_tdiv_div_bits(unsigned int div) argument
52 return ilog2(div) - 1;
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/mach-s3c64xx/include/mach/
H A Dpwm-clock.h47 * @div: The divisor to calculate the bit information for.
51 static inline unsigned long pwm_tdiv_div_bits(unsigned int div) argument
53 return ilog2(div);
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/mach-s5p6440/include/mach/
H A Dpwm-clock.h59 * @div: The divisor to calculate the bit information for.
63 static inline unsigned long pwm_tdiv_div_bits(unsigned int div) argument
65 return ilog2(div);
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/mach-s5pc100/include/mach/
H A Dpwm-clock.h47 * @div: The divisor to calculate the bit information for.
51 static inline unsigned long pwm_tdiv_div_bits(unsigned int div) argument
53 return ilog2(div);
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/mach-s5p6442/include/mach/
H A Dpwm-clock.h59 * @div: The divisor to calculate the bit information for.
63 static inline unsigned long pwm_tdiv_div_bits(unsigned int div) argument
65 return ilog2(div);
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/mach-s5pv210/include/mach/
H A Dpwm-clock.h59 * @div: The divisor to calculate the bit information for.
63 static inline unsigned long pwm_tdiv_div_bits(unsigned int div) argument
65 return ilog2(div);
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/mach-s5pv310/include/mach/
H A Dpwm-clock.h59 * @div: The divisor to calculate the bit information for.
63 static inline unsigned long pwm_tdiv_div_bits(unsigned int div) argument
65 return ilog2(div);
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/mmc/host/
H A Dsdhci-cns3xxx.c31 int div = 1; local
43 while (host->max_clk / div > clock) {
48 if (div < 4)
49 div += 1;
50 else if (div < 256)
51 div *= 2;
57 clock, host->max_clk / div);
60 if (div != 3)
61 div >>= 1;
63 clk = div << SDHCI_DIVIDER_SHIF
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/netgear-R7000-V1.0.7.12_1.2.5/ap/gpl/timemachine/openssl-0.9.8e/crypto/bn/asm/x86/
H A Ddiv.pl12 &div("ebx");
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/plat-samsung/include/plat/
H A Dhwmon.h21 * @div: Divide the value from the ADC by this.
24 * hwmon expects (mV) by result = (value_read * @mult) / @div.
29 unsigned int div; member in struct:s3c_hwmon_chcfg
/netgear-R7000-V1.0.7.12_1.2.5/ap/gpl/openssl/crypto/bn/asm/x86/
H A Ddiv.pl12 &div("ebx");
/netgear-R7000-V1.0.7.12_1.2.5/ap/gpl/openssl-1.0.2h/crypto/bn/asm/x86/
H A Ddiv.pl12 &div("ebx");
/netgear-R7000-V1.0.7.12_1.2.5/ap/gpl/minidlna/ffmpeg-2.3.4/libavcodec/mips/
H A Daacsbr_mips.h156 float *v0, int *v_off, const unsigned int div)
159 const float *sbr_qmf_window = div ? sbr_qmf_window_ds : sbr_qmf_window_us;
160 const int step = 128 >> div;
169 int saved_samples = (1280 - 128) >> div;
176 if (div) {
190 if(div == 0)
472 fdsp->vector_fmul (out, v , sbr_qmf_window , 64 >> div);
473 fdsp->vector_fmul_add(out, v + ( 192 >> div), sbr_qmf_window + ( 64 >> div), out , 64 >> div);
152 sbr_qmf_synthesis_mips(FFTContext *mdct, SBRDSPContext *sbrdsp, AVFloatDSPContext *fdsp, float *out, float X[2][38][64], float mdct_buf[2][64], float *v0, int *v_off, const unsigned int div) argument
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/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/sound/aoa/soundbus/i2sbus/
H A Dinterface.h90 # define I2S_SF_MCLKDIV_OTHER(div) (((div/2-1)<<I2S_SF_MCLKDIV_SHIFT)&I2S_SF_MCLKDIV_MASK)
91 static inline int i2s_sf_mclkdiv(int div, int *out) argument
95 switch(div) {
101 if (div%2) return -1;
102 d = div/2-1;
105 *out |= I2S_SF_MCLKDIV_OTHER(div);
117 # define I2S_SF_SCLKDIV_OTHER(div) (((div/2-1)<<I2S_SF_SCLKDIV_SHIFT)&I2S_SF_SCLKDIV_MASK)
118 static inline int i2s_sf_sclkdiv(int div, in argument
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/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/plat-s3c24xx/
H A Dclock-dclk.c75 unsigned long div; local
80 div = clk_get_rate(clk->parent) / rate;
81 if (div < 2)
82 div = 2;
83 else if (div > 16)
84 div = 16;
86 return div;
92 unsigned long div = s3c24xx_calc_div(clk, rate); local
94 if (div == 0)
97 return clk_get_rate(clk->parent) / div;
102 unsigned long mask, data, div = s3c24xx_calc_div(clk, rate); local
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/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/mn10300/include/asm/
H A Ddiv64.h66 unsigned __muldiv64u(unsigned val, unsigned mult, unsigned div) argument
71 "divu %3,%0 \n" /* val = MDR:val/div;
72 * MDR = MDR:val%div */
74 : "0"(val), "ir"(mult), "r"(div)
87 signed __muldiv64s(signed val, signed mult, signed div) argument
92 "div %3,%0 \n" /* val = MDR:val/div;
93 * MDR = MDR:val%div */
95 : "0"(val), "ir"(mult), "r"(div)
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/include/linux/
H A Djz4740-adc.h30 #define JZ_ADC_CONFIG_CLKDIV(div) ((div) << 5)
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/mach-rpc/include/mach/
H A Dacornfb.h85 u_int div; local
88 div = var->pixclock / 9090; /*9921*/
91 if (div == 0)
92 div = 1;
93 if (div > 8)
94 div = 8;
97 switch (div) {
136 vidc->pll_ctl = acornfb_vidc20_find_pll(var->pixclock / div);
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/mach-imx/
H A Dclock-imx1.c102 int div; local
107 div = parent_rate / rate;
109 div++;
111 if (div > limit)
112 div = limit;
114 return parent_rate / div;
248 unsigned int div; local
254 div = parent_rate / rate;
256 if (div > 16 || div <
289 unsigned int div; local
333 unsigned int div; local
370 unsigned int div; local
407 unsigned int div; local
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/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/mips/jz4740/
H A Dclock.c243 int div; local
245 div = parent_rate / rate;
246 if (div > 32)
248 else if (div < 1)
251 div &= (0x3 << (ffs(div) - 1));
253 return parent_rate / div;
259 uint32_t div; local
261 div = jz_clk_reg_read(JZ_REG_CLOCK_CTRL);
263 div >>
276 int div; local
449 int div; local
468 int div; local
483 int div; local
496 int div; local
515 int div; local
532 int div; local
551 int div; local
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/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/mips/alchemy/devboards/db1200/
H A Dsetup.c23 unsigned long freq0, clksrc, div, pfc; local
45 div = (get_au1x00_speed() + 25000000) / 50000000;
46 if (div & 1)
47 div++;
48 div = ((div >> 1) - 1) & 0xff;
50 freq0 = div << SYS_FC_FRDIV0_BIT;

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