Searched refs:clkdiv0 (Results 1 - 3 of 3) sorted by relevance
| /netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/plat-s3c24xx/ |
| H A D | s3c2443-clock.c | 152 unsigned long clkdiv0 = __raw_readl(S3C2443_CLKDIV0); local
154 clkdiv0 &= S3C2443_CLKDIV0_PREDIV_MASK;
155 clkdiv0 >>= S3C2443_CLKDIV0_PREDIV_SHIFT;
157 return rate / (clkdiv0 + 1);
386 unsigned long clkdiv0 = __raw_readl(S3C2443_CLKDIV0); local
402 fclk = pll / get_fdiv(clkdiv0);
404 hclk /= s3c2443_get_hdiv(clkdiv0);
405 pclk = hclk / ((clkdiv0 & S3C2443_CLKDIV0_HALF_PCLK) ? 2 : 1);
|
| /netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/mach-s3c64xx/ |
| H A D | clock.c | 750 u32 clkdiv0; local
754 clkdiv0 = __raw_readl(S3C_CLK_DIV0);
755 printk(KERN_DEBUG "%s: clkdiv0 = %08x\n", __func__, clkdiv0);
777 hclk2 = mpll / GET_DIV(clkdiv0, S3C6400_CLKDIV0_HCLK2);
778 hclk = hclk2 / GET_DIV(clkdiv0, S3C6400_CLKDIV0_HCLK);
779 pclk = hclk2 / GET_DIV(clkdiv0, S3C6400_CLKDIV0_PCLK);
|
| /netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/mach-s5pv210/ |
| H A D | clock.c | 975 u32 clkdiv0, clkdiv1; local
979 clkdiv0 = __raw_readl(S5P_CLK_DIV0);
982 printk(KERN_DEBUG "%s: clkdiv0 = %08x, clkdiv1 = %08x\n",
983 __func__, clkdiv0, clkdiv1);
|
Completed in 176 milliseconds