Searched refs:chipcHw_REG_PLL_DIVIDER_NDIV_f_SS (Results 1 - 3 of 3) sorted by relevance

/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/mach-bcmring/csp/chipc/
H A DchipcHw_init.c192 chipcHw_REG_PLL_DIVIDER_NDIV_f_SS;
H A DchipcHw.c81 /* Adjusted frequency due to chipcHw_REG_PLL_DIVIDER_NDIV_f_SS */
83 (uint64_t) chipcHw_REG_PLL_DIVIDER_NDIV_f_SS *
283 /* Adjusted frequency due to chipcHw_REG_PLL_DIVIDER_NDIV_f_SS */
285 (uint64_t) chipcHw_REG_PLL_DIVIDER_NDIV_f_SS *
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/mach-bcmring/include/mach/csp/
H A DchipcHw_reg.h209 #define chipcHw_REG_PLL_DIVIDER_NDIV_f_SS (0x00FFFFFF) /* To attain spread with max frequency */ macro

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