Searched refs:chcr (Results 1 - 7 of 7) sorted by relevance

/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/sh/drivers/dma/
H A Ddma-sh.c58 u32 chcr = __raw_readl(dma_base_addr[chan->chan] + CHCR); local
59 int cnt = ((chcr & CHCR_TS_LOW_MASK) >> CHCR_TS_LOW_SHIFT) |
60 ((chcr & CHCR_TS_HIGH_MASK) >> CHCR_TS_HIGH_SHIFT);
66 * The transfer end interrupt must read the chcr register to end the
74 u32 chcr; local
76 chcr = __raw_readl(dma_base_addr[chan->chan] + CHCR);
78 if (!(chcr & CHCR_TE))
81 chcr &= ~(CHCR_IE | CHCR_DE);
82 __raw_writel(chcr, (dma_base_addr[chan->chan] + CHCR));
109 sh_dmac_configure_channel(struct dma_channel *chan, unsigned long chcr) argument
130 u32 chcr; local
149 u32 chcr; local
[all...]
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/mach-shmobile/
H A Dsetup-sh7372.c262 .chcr = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT),
267 .chcr = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT),
272 .chcr = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT),
277 .chcr = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT),
282 .chcr = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT),
287 .chcr = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT),
292 .chcr = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT),
297 .chcr = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT),
302 .chcr = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT),
307 .chcr
[all...]
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/sh/kernel/cpu/sh4a/
H A Dsetup-sh7722.c30 .chcr = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT),
35 .chcr = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT),
40 .chcr = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT),
45 .chcr = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT),
50 .chcr = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT),
55 .chcr = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT),
60 .chcr = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_32BIT),
65 .chcr = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_32BIT),
70 .chcr = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_32BIT),
75 .chcr
[all...]
H A Dsetup-sh7724.c38 .chcr = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT),
43 .chcr = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT),
48 .chcr = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT),
53 .chcr = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT),
58 .chcr = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT),
63 .chcr = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT),
68 .chcr = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT),
73 .chcr = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT),
78 .chcr = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT),
83 .chcr
[all...]
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/include/linux/
H A Dsh_dma.h43 u32 chcr; member in struct:sh_dmae_slave_config
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/dma/
H A Dshdma.c100 u32 chcr = sh_dmae_readl(sh_chan, CHCR); local
102 if ((chcr & (CHCR_DE | CHCR_TE)) == CHCR_DE)
108 static unsigned int calc_xmit_shift(struct sh_dmae_chan *sh_chan, u32 chcr) argument
113 int cnt = ((chcr & pdata->ts_low_mask) >> pdata->ts_low_shift) |
114 ((chcr & pdata->ts_high_mask) >> pdata->ts_high_shift);
149 u32 chcr = sh_dmae_readl(sh_chan, CHCR); local
151 chcr |= CHCR_DE | CHCR_IE;
152 sh_dmae_writel(sh_chan, chcr & ~CHCR_TE, CHCR);
157 u32 chcr = sh_dmae_readl(sh_chan, CHCR); local
159 chcr
169 u32 chcr = DM_INC | SM_INC | 0x400 | log2size_to_chcr(sh_chan, local
807 u32 chcr = sh_dmae_readl(sh_chan, CHCR); local
[all...]
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/staging/comedi/drivers/
H A Dmite.c400 unsigned int chor, chcr, mcr, dcr, lkcr; local
410 chcr = CHCR_SET_DMA_IE | CHCR_LINKSHORT | CHCR_SET_DONE_IE |
420 chcr |= CHCR_SET_LC_IE;
429 chcr |= CHCR_BYTE_SWAP_DEVICE | CHCR_BYTE_SWAP_MEMORY;
432 chcr |= CHCR_DEV_TO_MEM;
434 writel(chcr, mite->mite_io_addr + MITE_CHCR(mite_chan->channel));

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