Searched refs:b43_phy_set (Results 1 - 8 of 8) sorted by relevance

/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/net/wireless/b43/
H A Dphy_g.c444 b43_phy_set(dev, 0x0811, 0x000C);
461 b43_phy_set(dev, 0x0478, 0x0100);
462 b43_phy_set(dev, 0x0801, 0x0040);
463 b43_phy_set(dev, 0x0060, 0x0040);
464 b43_phy_set(dev, 0x0014, 0x0200);
489 b43_phy_set(dev, 0x0814, 0x0001);
492 b43_phy_set(dev, 0x0811, 0x000C);
493 b43_phy_set(dev, 0x0812, 0x000C);
494 b43_phy_set(dev, 0x0811, 0x0030);
495 b43_phy_set(de
[all...]
H A Dphy_lp.c226 b43_phy_set(dev, B43_LPPHY_AFE_DAC_CTL, 0x0004);
328 b43_phy_set(dev, B43_LPPHY_CRSGAIN_CTL, 0x0006);
334 b43_phy_set(dev, B43_LPPHY_LP_PHY_CTL, 0x8000);
335 b43_phy_set(dev, B43_LPPHY_CRSGAIN_CTL, 0x0040);
425 b43_phy_set(dev, B43_LPPHY_ADC_COMPENSATION_CTL, 0x10);
433 b43_phy_set(dev, B43_PHY_OFDM(0x10A), 0x1);
475 b43_phy_set(dev, B43_LPPHY_CRSGAIN_CTL, 0x40);
487 b43_phy_set(dev, B43_LPPHY_RESET_CTL, 0x44);
495 b43_phy_set(dev, B43_LPPHY_AFE_ADC_CTL_0, 0x1C);
687 b43_phy_set(de
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H A Dphy_a.c198 b43_phy_set(dev, B43_PHY_OFDM(0x1B), 0x1000);
238 b43_phy_set(dev, B43_PHY_CRS0, B43_PHY_CRS0_EN);
263 b43_phy_set(dev, B43_PHY_ENCORE, 0x0010);
272 b43_phy_set(dev, 0x0034, 0x0001);
275 b43_phy_set(dev, B43_PHY_CRS0, B43_PHY_CRS0_EN);
480 b43_phy_set(dev, 0x0010, 0x0008);
481 b43_phy_set(dev, 0x0011, 0x0008);
526 b43_phy_set(dev, B43_PHY_OFDM61, 0x10);
H A Dphy_n.c180 b43_phy_set(dev, B43_NPHY_RFCTL_CMD,
183 b43_phy_set(dev, B43_NPHY_RFCTL_CMD,
400 b43_phy_set(dev, B43_NPHY_RFSEQMODE,
417 b43_phy_set(dev, B43_NPHY_IQEST_CMD, B43_NPHY_IQEST_CMD_MODE);
421 b43_phy_set(dev, B43_NPHY_IQEST_CMD, B43_NPHY_IQEST_CMD_START);
524 b43_phy_set(dev, B43_NPHY_AFECTL_OVER1, 0x0007);
527 b43_phy_set(dev, B43_NPHY_AFECTL_OVER, 0x0007);
764 b43_phy_set(dev, B43_NPHY_SAMP_CMD, B43_NPHY_SAMP_CMD_STOP);
917 b43_phy_set(dev, B43_NPHY_C1_CGAINI,
919 b43_phy_set(de
[all...]
H A Dlo.c400 b43_phy_set(dev, B43_PHY_HPWR_TSSICTL, 0x100);
401 b43_phy_set(dev, B43_PHY_EXTG(0x01), 0x40);
402 b43_phy_set(dev, B43_PHY_DACCTL, 0x40);
403 b43_phy_set(dev, B43_PHY_CCK(0x14), 0x200);
422 b43_phy_set(dev, B43_PHY_ANALOGOVER, 0x0003);
H A Dphy_common.h316 * b43_phy_set - OR a PHY register with a bitmap
318 void b43_phy_set(struct b43_wldev *dev, u16 offset, u16 set);
H A Dwa.c317 b43_phy_set(dev, B43_PHY_ANTDWELL, 0x0800);
322 b43_phy_set(dev, B43_PHY_ANTDWELL, 0x0800);
H A Dphy_common.c261 void b43_phy_set(struct b43_wldev *dev, u16 offset, u16 set) function

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