Searched refs:VIC_INT_ENABLE (Results 1 - 3 of 3) sorted by relevance

/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/include/asm/hardware/
H A Dvic.h27 #define VIC_INT_ENABLE 0x10 /* 1 = enable, 0 = disable */ macro
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/common/
H A Dvic.c41 * @int_enable: Save for VIC_INT_ENABLE.
103 writel(vic->int_enable, base + VIC_INT_ENABLE);
122 vic->int_enable = readl(base + VIC_INT_ENABLE);
129 writel(vic->resume_irqs, base + VIC_INT_ENABLE);
227 writel(1 << irq, base + VIC_INT_ENABLE);
279 writel(0, base + VIC_INT_ENABLE);
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/plat-s5p/
H A Dirq-eint.c175 writel(1 << EINT_OFFSET(irq), base + VIC_INT_ENABLE);

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