Searched refs:TxReset (Results 1 - 9 of 9) sorted by relevance

/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/net/pcmcia/
H A D3c574_cs.c140 TxEnable = 9<<11, TxDisable = 10<<11, TxReset = 11<<11, enumerator in enum:el3_cmds
410 tc574_wait_for_completion(dev, TxReset);
652 tc574_wait_for_completion(dev, TxReset);
733 tc574_wait_for_completion(dev, TxReset);
750 tc574_wait_for_completion(dev, TxReset);
855 tc574_wait_for_completion(dev, TxReset);
H A D3c589_cs.c80 TxReset = 11<<11, enumerator in enum:c509cmd
560 tc589_wait_for_completion(dev, TxReset);
576 tc589_wait_for_completion(dev, TxReset);
670 tc589_wait_for_completion(dev, TxReset);
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/net/
H A D3c509.c70 TxEnable = 9<<11, TxDisable = 10<<11, TxReset = 11<<11, enumerator in enum:c509cmd
719 outw(TxReset, ioaddr + EL3_CMD);
753 outw(TxReset, ioaddr + EL3_CMD);
810 if (tx_status & 0x30) outw(TxReset, ioaddr + EL3_CMD);
864 if (tx_status & 0x30) outw(TxReset, ioaddr + EL3_CMD);
H A D3c515.c190 TxDisable = 10 << 11, TxReset = 11 << 11, FakeIntr = 12 << 11, enumerator in enum:corkscrew_cmd
750 outw(TxReset, ioaddr + EL3_CMD);
989 outw(TxReset, ioaddr + EL3_CMD);
1109 outw(TxReset, ioaddr + EL3_CMD);
H A Ddl2k.h223 TxReset = 0x0004, enumerator in enum:ASICCtrl_HiWord_bits
H A Dsundance.c305 TxReset = 0x0004, enumerator in enum:ASICCtrl_HiWord_bit
1103 sundance_reset(dev, (NetworkReset|FIFOReset|DMAReset|TxReset) << 16);
1193 sundance_reset(dev, (NetworkReset|FIFOReset|TxReset) << 16);
H A D3c59x.c444 RxDiscard = 8<<11, TxEnable = 9<<11, TxDisable = 10<<11, TxReset = 11<<11, enumerator in enum:vortex_cmd
1628 issue_and_wait(dev, TxReset);
1923 issue_and_wait(dev, TxReset);
2047 issue_and_wait(dev, TxReset|reset_mask);
2102 issue_and_wait(dev, TxReset);
H A Ddl2k.c772 /* Transmit Underrun need to set TxReset, DMARest, FIFOReset */
773 writew (TxReset | DMAReset | FIFOReset | NetworkReset,
793 /* TxReset and clear FIFO */
794 writew (TxReset | FIFOReset, ioaddr + ASICCtrl + 2);
H A Dnatsemi.c322 TxReset = 0x10, enumerator in enum:ChipCmd_bits

Completed in 131 milliseconds