Searched refs:TWI0_CLKDIV (Results 1 - 5 of 5) sorted by relevance

/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/blackfin/mach-bf538/include/mach/
H A DdefBF539.h443 #define TWI0_CLKDIV 0xFFC01400 /* Serial Clock Divider Register */ macro
460 #define TWI0_REGBASE TWI0_CLKDIV
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/blackfin/mach-bf518/include/mach/
H A DdefBF51x_base.h461 #define TWI0_CLKDIV 0xFFC01400 /* Serial Clock Divider Register */ macro
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/blackfin/mach-bf527/include/mach/
H A DdefBF52x_base.h461 #define TWI0_CLKDIV 0xFFC01400 /* Serial Clock Divider Register */ macro
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/blackfin/mach-bf537/include/mach/
H A DdefBF534.h437 #define TWI0_CLKDIV 0xFFC01400 /* Serial Clock Divider Register */ macro
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/blackfin/mach-bf548/include/mach/
H A DdefBF54x_base.h106 #define TWI0_CLKDIV 0xffc00700 /* Clock Divider Register */ macro

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