Searched refs:SDRC_DLLA_CTRL (Results 1 - 8 of 8) sorted by relevance

/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/mach-omap2/
H A Dsdrc2xxx.c68 u32 dll_state = sdrc_read_reg(SDRC_DLLA_CTRL);
140 fast_dll = sdrc_read_reg(SDRC_DLLA_CTRL);
H A Dsram242x.S125 .word OMAP242X_SDRC_REGADDR(SDRC_DLLA_CTRL)
137 * r0 = [PRCM_FULL | PRCM_HALF] r1 = SDRC_DLLA_CTRL value r2 = [DDR | SDR]
182 str r1, [r2] @ write out new SDRC_DLLA_CTRL
219 .word OMAP242X_SDRC_REGADDR(SDRC_DLLA_CTRL)
318 .word OMAP242X_SDRC_REGADDR(SDRC_DLLA_CTRL)
H A Dsram243x.S125 .word OMAP243X_SDRC_REGADDR(SDRC_DLLA_CTRL)
137 * r0 = [PRCM_FULL | PRCM_HALF] r1 = SDRC_DLLA_CTRL value r2 = [DDR | SDR]
182 str r1, [r2] @ write out new SDRC_DLLA_CTRL
219 .word OMAP243X_SDRC_REGADDR(SDRC_DLLA_CTRL)
318 .word OMAP243X_SDRC_REGADDR(SDRC_DLLA_CTRL)
H A Dpm24xx.c125 omap2_sram_suspend(sdrc_read_reg(SDRC_DLLA_CTRL),
126 OMAP_SDRC_REGADDR(SDRC_DLLA_CTRL),
H A Dcontrol.c271 sdrc_block_contents.dll_a_ctrl = sdrc_read_reg(SDRC_DLLA_CTRL);
H A Dsram34xx.S43 /* SDRC_DLLA_CTRL bit settings */
49 * SDRC_DLLA_CTRL default values: TI hardware team indicates that
309 .word OMAP34XX_SDRC_REGADDR(SDRC_DLLA_CTRL)
H A Dsleep34xx.S60 #define SDRC_DLLA_CTRL_V OMAP34XX_SDRC_REGADDR(SDRC_DLLA_CTRL)
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/plat-omap/include/plat/
H A Dsdrc.h27 #define SDRC_DLLA_CTRL 0x060 macro

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