Searched refs:S3C2443_CLKDIV0_HALF_PCLK (Results 1 - 2 of 2) sorted by relevance

/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/mach-s3c2410/include/mach/
H A Dregs-s3c2443-clock.h54 #define S3C2443_CLKDIV0_HALF_PCLK (1<<2) macro
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/plat-s3c24xx/
H A Ds3c2443-clock.c405 pclk = hclk / ((clkdiv0 & S3C2443_CLKDIV0_HALF_PCLK) ? 2 : 1);

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