Searched refs:S3C2443_CLKDIV0 (Results 1 - 3 of 3) sorted by relevance

/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/mach-s3c2443/
H A Dclock.c131 clkcon0 = __raw_readl(S3C2443_CLKDIV0);
134 __raw_writel(clkcon0, S3C2443_CLKDIV0);
169 .reg_src = { .reg = S3C2443_CLKDIV0, .size = 1, .shift = 13 },
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/plat-s3c24xx/
H A Ds3c2443-clock.c107 unsigned long div = __raw_readl(S3C2443_CLKDIV0);
152 unsigned long clkdiv0 = __raw_readl(S3C2443_CLKDIV0);
386 unsigned long clkdiv0 = __raw_readl(S3C2443_CLKDIV0);
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/mach-s3c2410/include/mach/
H A Dregs-s3c2443-clock.h29 #define S3C2443_CLKDIV0 S3C2443_CLKREG(0x24) macro

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