Searched refs:PFB (Results 1 - 7 of 7) sorted by relevance
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/video/riva/ |
H A D | nv_driver.c | 165 if (NV_RD32(chip->PFB, 0x00000000) & 0x00000020) { 171 switch (NV_RD32(chip->PFB,0x00000000) & 0x03) { 189 switch (NV_RD32(chip->PFB, 0x00000000) & 0x00000003) { 203 if (NV_RD32(chip->PFB, 0x00000000) & 0x00000100) { 204 memlen = ((NV_RD32(chip->PFB, 0x00000000)>>12)&0x0F) * 207 switch (NV_RD32(chip->PFB, 0x00000000) & 0x00000003) { 239 switch ((NV_RD32(chip->PFB, 0x0000020C) >> 20) & 279 if (NV_RD32(chip->PFB, 0x00000000) & 0x00000020) { 300 switch ((NV_RD32(chip->PFB, 0x00000000) >> 3) & 0x00000003) { 319 par->riva.PFB [all...] |
H A D | riva_hw.c | 817 cfg1 = NV_RD32(&chip->PFB[0x00000204/4], 0); 1080 cfg1 = NV_RD32(&chip->PFB[0x00000204/4], 0); 1084 sim_data.memory_type = (NV_RD32(&chip->PFB[0x00000200/4], 0) & 0x01) ? 1316 state->config = NV_RD32(&chip->PFB[0x00000200/4], 0); 1407 NV_WR32(chip->PFB, 0x00000200, state->config); 1447 NV_WR32(chip->PFB, 0x00000200, state->config); 1544 NV_WR32(chip->PGRAPH, 0x000009A4, NV_RD32(chip->PFB, 0x00000200)); 1545 NV_WR32(chip->PGRAPH, 0x000009A8, NV_RD32(chip->PFB, 0x00000204)); 1561 NV_WR32(chip->PFB, 0x00000240, 0); 1562 NV_WR32(chip->PFB, [all...] |
H A D | nvreg.h | 63 #define PFB_Write(reg,value) DEVICE_WRITE(PFB,reg,value) 64 #define PFB_Read(reg) DEVICE_READ(PFB,reg) 65 #define PFB_Print(reg) DEVICE_PRINT(PFB,reg) 66 #define PFB_Def(mask,value) DEVICE_DEF(PFB,mask,value) 67 #define PFB_Val(mask,value) DEVICE_VALUE(PFB,mask,value) 68 #define PFB_Mask(mask) DEVICE_MASK(PFB,mask)
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H A D | riva_hw.h | 447 volatile U032 __iomem *PFB; member in struct:_riva_hw_inst
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/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/video/nvidia/ |
H A D | nv_hw.c | 391 cfg1 = NV_RD32(par->PFB, 0x00000204); 630 cfg1 = NV_RD32(par->PFB, 0x0204); 634 sim_data.memory_type = (NV_RD32(par->PFB, 0x0200) & 0x01) ? 1 : 0; 932 state->config = NV_RD32(par->PFB, 0x00000200); 960 NV_WR32(par->PFB, 0x0200, state->config); 964 NV_WR32(par->PFB, 0x0240 + (i * 0x10), 0); 965 NV_WR32(par->PFB, 0x0244 + (i * 0x10), 978 NV_WR32(par->PFB, 0x0600 + (i * 0x10), 0); 979 NV_WR32(par->PFB, 0x0604 + (i * 0x10), 1204 NV_RD32(&par->PFB[( [all...] |
H A D | nv_setup.c | 202 if (NV_RD32(par->PFB, 0x0000) & 0x00000100) { 204 ((NV_RD32(par->PFB, 0x0000) >> 12) & 0x0F) * 1024 * 2 + 207 switch (NV_RD32(par->PFB, 0x0000) & 0x00000003) { 256 (NV_RD32(par->PFB, 0x020C) & 0xFFF00000) >> 10; 300 par->PFB = par->REGS + (0x00100000 / 4);
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H A D | nv_type.h | 163 volatile u32 __iomem *PFB; member in struct:nvidia_par
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