Searched refs:P0 (Results 1 - 25 of 40) sorted by relevance

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/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/blackfin/kernel/
H A Dfixed_code.S26 P0 = __NR_rt_sigreturn; define
35 * Inputs: P0: memory address to use
40 R0 = [P0];
41 [P0] = R1;
48 * Inputs: P0: memory address to use
56 R0 = [P0];
59 [P0] = R2;
67 * Inputs: P0: memory address to use
73 R1 = [P0];
75 [P0]
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/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/blackfin/lib/
H A Douts.S16 P0 = R0; /* P0 = port */ define
22 .Llong_loop_e: [P0] = R0;
27 P0 = R0; /* P0 = port */ define
33 .Lword_loop_e: W[P0] = R0;
38 P0 = R0; /* P0 = port */ define
44 .Lbyte_loop_e: B[P0] = R0;
49 P0 define
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H A Dstrcpy.S25 P0 = R0 ; /* dst*/ define
30 B [P0++] = R1;
H A Dmemcpy.S35 P0 = R0 ; /* dst*/ define
66 B[P0++] = R3;
78 [P0++] = R3;
84 MNOP || [P0++] = R3 || R3 = [I1++];
86 [P0++] = R3;
101 B[P0++] = R1;
112 P0 = P0 + P2; define
113 P0 += -1;
120 B[P0
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H A Dmemmove.S21 P0 = R0; /* P0 = To address */ define
52 [P0++] = R1;
58 MNOP || [P0++] = R1 || R1 = [I0++];
60 [P0++] = R1;
70 .Lbyte2_e: B[P0++] = R1;
77 P0 = P0 + P2; define
87 .Lol_s: B[P0--] = R1;
89 .Lno_loop: B[P0]
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H A Dmemset.S27 P0 = R0 ; /* P0 = address */ define
47 [P0++] = R2;
49 CC = P0 == P2;
55 R3 = P0; /* current position */
66 B[P0++] = R1;
76 R0 = P0; /* Recover return address */
78 B[P0++] = R1;
83 B[P0++] = R1;
84 B[P0
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H A Dmemchr.S22 P0 = R0; /* P0 = address */ define
32 R3 = B[P0++](Z);
43 R0 = P0;
H A Dmemcmp.S23 P0 = R0; /* P0 = s1 address */ define
42 R0 = [P0++];
45 MNOP || R0 = [P0++] || R1 = [I0++];
61 R0 = B[P0++](Z); /* *s1 */
81 P0 += -4; /* back up to the start of the */
H A Dins.S76 P0 = R0; /* P0 = port */ \ define
92 R0 = [P0]; \
97 R0 = W[P0]; \
102 R0 = W[P0]; \
109 R0 = B[P0]; \
114 R0 = [P0]; \
H A Dstrcmp.S27 P0 = R0 ; /* s1 */ define
31 R0 = B[P0++] (Z); /* get *s1 */
H A Dstrncpy.S31 P0 = R0 ; /* dst*/ define
37 B [P0++] = R1;
71 R0 = P0;
81 B [P0++] = R1;
H A Dstrncmp.S28 P0 = R0 ; /* s1 */ define
31 R0 = B[P0++] (Z); /* get *s1 */
H A Dudivsi3.S133 P0 = 0; define
139 IF CC P0 = R6; /* Number of values divided */
142 /* P0 is 0, 1 (NR/=2) or 2 (NR/=2, DR/=2) */
164 CC = P0 == 0; /* Check how many inputs we shifted */
167 CC = P0 == 1;
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/blackfin/include/asm/
H A Dentry.h38 P0.l = lo(IPEND); \
39 P0.h = hi(IPEND); \
40 R1 = [P0];
64 [--sp] = P0; /*orig_p0*/ \
73 [--sp] = P0; /*orig_p0*/ \
89 [--sp] = P0; /*orig_p0*/ \
101 [--sp] = P0; /*orig_p0*/ \
106 P0.L = LO(ILAT); \
107 P0.H = HI(ILAT); \
111 R0 = [P0]; \
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H A Ddpmc.h135 R0 = [P0 + (x - SRAM_BASE_ADDRESS)];\
140 [P0 + (x - SRAM_BASE_ADDRESS)] = R0;\
143 R0 = [P0 + (x - PLL_CTL)];\
148 [P0 + (x - PLL_CTL)] = R0;\
151 R0 = w[P0 + (x - PLL_CTL)];\
156 w[P0 + (x - PLL_CTL)] = R0;\
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/blackfin/mach-common/
H A Ddpmc_modes.S20 P0.H = hi(PLL_CTL);
21 P0.L = lo(PLL_CTL);
22 R1 = W[P0](z);
24 W[P0] = R1.L;
39 P0.H = hi(PLL_CTL);
40 P0.L = lo(PLL_CTL);
65 P0.H = hi(VR_CTL);
66 P0.L = lo(VR_CTL);
68 W[P0] = R3.L;
92 P0
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H A Dcache.S55 P0 = R0; define
60 \flushins [P0++];
63 2: \flushins [P0++];
H A Dinterrupt.S150 P0.L = LO(ILAT);
151 P0.H = HI(ILAT);
152 R1 = [P0];
157 [P0] = R1;
/netgear-R7000-V1.0.7.12_1.2.5/ap/gpl/iserver/libav-0.8.8/libavcodec/bfin/
H A Dfdct_bfin.S60 R0, R1, R2, R3, R4, R5, R6,R7, P0, P1, P2, P3, P4, P5, A0, A1.
165 * to read the coefficients. P0 and P1 registers are used for writing the output
177 P0 = 2(X); define
194 lsetup (.2, .3) LC0 = P0;
203 P0 = B2; // P0 points to temporary array Element define
287 A1=R1.H*R7.L, A0=R1.L*R7.L || W[P0++P3]=R5.L || R2.L=W[I0];
300 A1=R2.H*R7.L, A0=R2.L*R7.L || W[P0++P3]=R6.H || R0=[I0++];
301 R2.H=(A1+=R2.L*R7.H),R2.L=(A0-=R2.H*R7.H) || W[P0++P3]=R5.H || R7=[I3++];
311 A1=R4.H*R7.H, A0=R4.L*R7.H || W[P0
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H A Didct_bfin.S27 Registers Used : A0, A1, R0-R7, I0-I3, B0, B2, B3, M0-M2, L0-L3, P0-P5, LC0.
123 P0 = B2; // P0 points to array Element (0, 0) of temp define
195 R2.H=R1+R7 (RND12) || W[P0++P3]=R5.H; // Y2=Y2+Y5 st Y0
197 R5.H=R0-R3 (RND12) || W[P0++P3]=R2.H || R1.L=W[I1++]; // Y1=Y6-Y1 st Y2
199 R3.H=R4-R6 (RND12) || W[P0++P3]=R5.H || R0.L=W[I2++]; // Y3=Y3-Y4 st Y1
203 A1=R7.H*R0.H, A0=R7.H*R0.H (IS) || W[P0++P2]= R3.H || R1.H = W[I0--];
218 P0 = B0; // P0 points to array Element (0, 0) for writing define
289 R2.H=R1+R7 (RND20) || W[P0
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H A Dvp3_idct_bfin.S27 Registers Used : A0, A1, R0-R7, I0-I3, B0, B2, B3, M0-M2, L0-L3, P0-P5, LC0.
96 P0 = B2; // P0 points to array Element (0, 0) of temp define
168 R2.H=R1+R7 (RND12) || W[P0++P3]=R5.H; // Y2=Y2+Y5 st Y0
170 R5.H=R0-R3 (RND12) || W[P0++P3]=R2.H || R1.L=W[I1++]; // Y1=Y6-Y1 st Y2
172 R3.H=R4-R6 (RND12) || W[P0++P3]=R5.H || R0.L=W[I2++]; // Y3=Y3-Y4 st Y1
176 A1=R7.H*R0.H, A0=R7.H*R0.H (IS) || W[P0++P2]= R3.H || R1.H = W[I0--];
191 P0 = B0; // P0 points to array Element (0, 0) for writing define
263 R2.H=R1+R7 (RND20) || W[P0
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H A Dpixels_bfin.S33 P0 = 8; define
37 LSETUP (ppc$0,ppc$1) LC0=P0;
63 P0 = 8; define
70 LSETUP(apc$2,apc$3) LC1 = P0;
116 LSETUP(pp8$0,pp8$1) LC0=P0;
146 LSETUP(pp16$0,pp16$1) LC0=P0;
181 LSETUP(pp8$2,pp8$3) LC0=P0;
208 LSETUP(pp16$2,pp16$3) LC0=P0;
250 LSETUP(LS$16E,LE$16E) LC0=P0;
268 LSETUP(LS$16O,LE$16O) LC0=P0;
610 P0 = R1; // line_size define
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/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/blackfin/mach-bf561/
H A Dsecondary.S36 P0 = R0; define
96 [P0] = R0;
167 P0.H = hi(SICB_IWR0);
168 P0.L = lo(SICB_IWR0);
171 [P0] = R0;
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/ata/
H A Data_piix.c120 P0 = 0, /* port 0 */ enumerator in enum:__anon10740
363 { P0, NA, P1, NA }, /* 000b */
364 { P1, NA, P0, NA }, /* 001b */
367 { P0, P1, IDE, IDE }, /* 100b */
368 { P1, P0, IDE, IDE }, /* 101b */
369 { IDE, IDE, P0, P1 }, /* 110b */
370 { IDE, IDE, P1, P0 }, /* 111b */
379 { P0, P2, P1, P3 }, /* 00b */
381 { P0, P2, IDE, IDE }, /* 10b */
396 { P0, P
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/netgear-R7000-V1.0.7.12_1.2.5/ap/gpl/iserver/libav-0.8.8/libavcodec/
H A Dcavsdsp.c37 #define P0 p0_p[-1*stride] macro
43 int p0 = P0;
50 P0 = (P1 + p0 + s) >> 2;
53 P0 = (2*P1 + s) >> 2;
63 int p0 = P0;
68 P0 = av_clip_uint8(p0+delta);
71 delta = av_clip(((P0-P1)*3+P2-Q0+4)>>3, -tc, tc);
75 delta = av_clip(((Q1-Q0)*3+P0-Q2+4)>>3, -tc, tc);
82 int p0 = P0;
89 P0
108 #undef P0 macro
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