Searched refs:MCLK (Results 1 - 10 of 10) sorted by relevance

/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/mach-ebsa110/
H A Dcore.c129 * This is the rate at which your MCLK signal toggles (in Hz)
133 #define MCLK 47894000 macro
138 #define CLKBY7 (MCLK / 7)
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/spi/
H A Dmpc52xx_psc_spi.c32 #define MCLK 20000000 /* PSC port MClk in hz */ macro
110 ccr |= (MCLK / cs->speed_hz - 1) & 0xFF;
112 ccr |= (MCLK / 1000000 - 1) & 0xFF;
321 mclken_div = (mps->sysclk ? mps->sysclk : 512000000) / MCLK;
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/mm/
H A Dproc-sa110.S94 ldr r1, [r1, #0] @ force switch to MCLK
H A Dproc-sa1100.S111 ldr r1, [r1, #0] @ force switch to MCLK
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/video/savage/
H A Dsavagefb.h210 int MCLK, REFCLK, LCDclk; member in struct:savagefb_par
H A Dsavagefb_driver.c1087 if (par->MCLK <= 0) {
1091 common_calc_clock(par->MCLK, 1, 1, 31, 0, 3, 135000, 270000,
1093 /* reg->SR10 = 80; // MCLK == 286000 */
1407 /* Restore extended sequencer regs for MCLK. SR10 == 255 indicates
1946 par->MCLK = ((1431818 * (m+2)) / (n1+2) / (1 << n2) + 50) / 100;
1947 printk(KERN_INFO "savagefb: Detected current MCLK value of %d kHz\n",
1948 par->MCLK);
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/video/sis/
H A Dinit.c2252 SiS_DoCalcDelay(struct SiS_Private *SiS_Pr, unsigned short MCLK, unsigned short VCLK, argument
2265 idx1 = longtemp % (MCLK * 16);
2266 longtemp /= (MCLK * 16);
2273 unsigned short colordepth, unsigned short MCLK)
2277 temp2 = SiS_DoCalcDelay(SiS_Pr, MCLK, VCLK, colordepth, 0);
2278 temp1 = SiS_DoCalcDelay(SiS_Pr, MCLK, VCLK, colordepth, 1);
2290 unsigned short temp, index, VCLK, MCLK, colorth; local
2306 /* Get MCLK */
2308 MCLK = SiS_Pr->SiS_MCLKData_0[index].CLOCK;
2314 ThresholdLow = SiS_CalcDelay(SiS_Pr, VCLK, colorth, MCLK)
2272 SiS_CalcDelay(struct SiS_Private *SiS_Pr, unsigned short VCLK, unsigned short colordepth, unsigned short MCLK) argument
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H A Dinit301.c5067 unsigned short VCLK = 0, MCLK, colorth = 0, data2 = 0; local
5107 /* Get MCLK */
5114 MCLK = SiS_Pr->SiS_MCLKData_0[index].CLOCK;
5120 data2 = temp - ((colorth * VCLK) / MCLK);
5205 temp = data % (MCLK << 4);
5206 data = data / (MCLK << 4);
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/video/matrox/
H A Dmatroxfb_Ti3026.c204 #define TVP3026_XPLLADDR_X(LOOP,MCLK,PIX) (((LOOP)<<4) | ((MCLK)<<2) | (PIX))
485 /* stop MCLK */
517 /* output MCLK to MCLK pin */
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/video/aty/
H A Daty128fb.c292 u16 MCLK; member in struct:__anon16238

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