Searched refs:JZ_REG_CLOCK_PLL (Results 1 - 1 of 1) sorted by relevance

/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/mips/jz4740/
H A Dclock.c32 #define JZ_REG_CLOCK_PLL 0x10 macro
216 val = jz_clk_reg_read(JZ_REG_CLOCK_PLL);
875 jz_clk_reg_clear_bits(JZ_REG_CLOCK_PLL, JZ_CLOCK_PLL_ENABLED);
882 jz_clk_reg_set_bits(JZ_REG_CLOCK_PLL, JZ_CLOCK_PLL_ENABLED);
885 pll = jz_clk_reg_read(JZ_REG_CLOCK_PLL);

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