Searched refs:IO_ADDRESS (Results 1 - 25 of 89) sorted by relevance

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/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/mach-realview/include/mach/
H A Dhardware.h29 #define IO_ADDRESS(x) (((x) & 0x03ffffff) + 0xfb000000) macro
31 #define IO_ADDRESS(x) (x) macro
33 #define __io_address(n) __io(IO_ADDRESS(n))
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/mach-pnx4008/
H A Dtime.h23 #define MSTIM_INT IO_ADDRESS((PNX4008_MSTIMER_BASE + 0x0))
24 #define MSTIM_CTRL IO_ADDRESS((PNX4008_MSTIMER_BASE + 0x4))
25 #define MSTIM_COUNTER IO_ADDRESS((PNX4008_MSTIMER_BASE + 0x8))
26 #define MSTIM_MCTRL IO_ADDRESS((PNX4008_MSTIMER_BASE + 0x14))
27 #define MSTIM_MATCH0 IO_ADDRESS((PNX4008_MSTIMER_BASE + 0x18))
28 #define MSTIM_MATCH1 IO_ADDRESS((PNX4008_MSTIMER_BASE + 0x1c))
32 #define HSTIM_INT IO_ADDRESS((PNX4008_HSTIMER_BASE + 0x0))
33 #define HSTIM_CTRL IO_ADDRESS((PNX4008_HSTIMER_BASE + 0x4))
34 #define HSTIM_COUNTER IO_ADDRESS((PNX4008_HSTIMER_BASE + 0x8))
35 #define HSTIM_PMATCH IO_ADDRESS((PNX4008_HSTIMER_BAS
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H A Dserial.c32 #define UART3_BASE_VA IO_ADDRESS(PNX4008_UART3_BASE)
33 #define UART4_BASE_VA IO_ADDRESS(PNX4008_UART4_BASE)
34 #define UART5_BASE_VA IO_ADDRESS(PNX4008_UART5_BASE)
35 #define UART6_BASE_VA IO_ADDRESS(PNX4008_UART6_BASE)
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/mach-spear3xx/include/mach/
H A Dhardware.h18 #define IO_ADDRESS(x) (x | 0xF0000000) macro
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/mach-spear6xx/include/mach/
H A Dhardware.h18 #define IO_ADDRESS(x) (x | 0xF0000000) macro
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/mach-pnx4008/include/mach/
H A Dirq.h18 #define MIC_VA_BASE IO_ADDRESS(PNX4008_INTCTRLMIC_BASE)
19 #define SIC1_VA_BASE IO_ADDRESS(PNX4008_INTCTRLSIC1_BASE)
20 #define SIC2_VA_BASE IO_ADDRESS(PNX4008_INTCTRLSIC2_BASE)
26 #define INTC_ER(irq) IO_ADDRESS((PNX4008_INTCTRLMIC_BASE + 0x0 + (((irq)&(0x3<<5))<<9)))
27 #define INTC_RSR(irq) IO_ADDRESS((PNX4008_INTCTRLMIC_BASE + 0x4 + (((irq)&(0x3<<5))<<9)))
28 #define INTC_SR(irq) IO_ADDRESS((PNX4008_INTCTRLMIC_BASE + 0x8 + (((irq)&(0x3<<5))<<9)))
29 #define INTC_APR(irq) IO_ADDRESS((PNX4008_INTCTRLMIC_BASE + 0xC + (((irq)&(0x3<<5))<<9)))
30 #define INTC_ATR(irq) IO_ADDRESS((PNX4008_INTCTRLMIC_BASE + 0x10 + (((irq)&(0x3<<5))<<9)))
31 #define INTC_ITR(irq) IO_ADDRESS((PNX4008_INTCTRLMIC_BASE + 0x14 + (((irq)&(0x3<<5))<<9)))
35 #define START_INT_ER_REG(irq) IO_ADDRESS((PNX4008_PWRMAN_BAS
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H A Dhardware.h30 #define IO_ADDRESS(x) (((((x) & 0xff000000) >> 4) | ((x) & 0xfffff)) | IO_BASE) macro
H A Dclock.h19 #define PWRMAN_VA_BASE IO_ADDRESS(PNX4008_PWRMAN_BASE)
44 #define AUDIOCONFIG_VA_BASE IO_ADDRESS(PNX4008_AUDIOCONFIG_BASE)
50 #define USB_OTG_CLKCTRL_REG IO_ADDRESS(PNX4008_USB_CONFIG_BASE + 0xff4)
52 #define VFP9CLKCTRL_REG IO_ADDRESS(PNX4008_DEBUG_BASE)
H A Dentry-macro.S16 #define IO_ADDRESS(x) (((((x) & 0xff000000) >> 4) | ((x) & 0xfffff)) | IO_BASE) define
39 ldr \base, =IO_ADDRESS(PNX4008_INTCTRLMIC_BASE)
72 ldreq \base, =IO_ADDRESS(PNX4008_INTCTRLSIC1_BASE)
74 ldrne \base, =IO_ADDRESS(PNX4008_INTCTRLSIC2_BASE)
88 ldrne \base, =IO_ADDRESS(PNX4008_INTCTRLSIC1_BASE)
90 ldreq \base, =IO_ADDRESS(PNX4008_INTCTRLSIC2_BASE)
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/mach-versatile/include/mach/
H A Dsystem.h41 val = __raw_readl(IO_ADDRESS(VERSATILE_SYS_RESETCTL)) & ~0x7;
44 __raw_writel(0xa05f, IO_ADDRESS(VERSATILE_SYS_LOCK));
45 __raw_writel(val, IO_ADDRESS(VERSATILE_SYS_RESETCTL));
46 __raw_writel(0, IO_ADDRESS(VERSATILE_SYS_LOCK));
H A Dhardware.h40 #define IO_ADDRESS(x) (((x) & 0x0fffffff) + (((x) >> 4) & 0x0f000000) + 0xf0000000) macro
42 #define __io_address(n) __io(IO_ADDRESS(n))
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/mach-integrator/include/mach/
H A Dhardware.h44 #define IO_ADDRESS(x) (((x) & 0x000fffff) | (((x) >> 4) & 0x0ff00000) | IO_BASE) macro
46 #define IO_ADDRESS(x) (x) macro
49 #define __io_address(n) ((void __iomem *)IO_ADDRESS(n))
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/plat-stmp3xxx/include/mach/
H A Dhardware.h30 #define IO_ADDRESS(x) (((x) & 0x000fffff) | IO_BASE) macro
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/mach-gemini/
H A Dmm.c22 .virtual = IO_ADDRESS(GEMINI_GLOBAL_BASE),
27 .virtual = IO_ADDRESS(GEMINI_UART_BASE),
32 .virtual = IO_ADDRESS(GEMINI_TIMER_BASE),
37 .virtual = IO_ADDRESS(GEMINI_INTERRUPT_BASE),
42 .virtual = IO_ADDRESS(GEMINI_POWER_CTRL_BASE),
47 .virtual = IO_ADDRESS(GEMINI_GPIO_BASE(0)),
52 .virtual = IO_ADDRESS(GEMINI_GPIO_BASE(1)),
57 .virtual = IO_ADDRESS(GEMINI_GPIO_BASE(2)),
62 .virtual = IO_ADDRESS(GEMINI_FLASH_CTRL_BASE),
67 .virtual = IO_ADDRESS(GEMINI_DRAM_CTRL_BAS
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H A Dirq.c37 __raw_writel(1 << irq, IRQ_CLEAR(IO_ADDRESS(GEMINI_INTERRUPT_BASE)));
44 mask = __raw_readl(IRQ_MASK(IO_ADDRESS(GEMINI_INTERRUPT_BASE)));
46 __raw_writel(mask, IRQ_MASK(IO_ADDRESS(GEMINI_INTERRUPT_BASE)));
53 mask = __raw_readl(IRQ_MASK(IO_ADDRESS(GEMINI_INTERRUPT_BASE)));
55 __raw_writel(mask, IRQ_MASK(IO_ADDRESS(GEMINI_INTERRUPT_BASE)));
67 .start = IO_ADDRESS(GEMINI_INTERRUPT_BASE),
68 .end = IO_ADDRESS(FIQ_STATUS(GEMINI_INTERRUPT_BASE)) + 4,
96 __raw_writel(0, IRQ_MASK(IO_ADDRESS(GEMINI_INTERRUPT_BASE)));
97 __raw_writel(0, FIQ_MASK(IO_ADDRESS(GEMINI_INTERRUPT_BASE)));
100 __raw_writel(mode, IRQ_TMODE(IO_ADDRESS(GEMINI_INTERRUPT_BAS
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H A Ddevices.c23 .membase = (void *)IO_ADDRESS(GEMINI_UART_BASE),
70 reg = __raw_readl(IO_ADDRESS(GEMINI_GLOBAL_BASE) + GLOBAL_STATUS);
81 reg = __raw_readl(IO_ADDRESS(GEMINI_GLOBAL_BASE) + GLOBAL_MISC_CTRL);
84 __raw_writel(reg, IO_ADDRESS(GEMINI_GLOBAL_BASE) + GLOBAL_MISC_CTRL);
H A Dtime.c59 reg_v = __raw_readl(IO_ADDRESS(GEMINI_GLOBAL_BASE + GLOBAL_STATUS));
86 __raw_writel(tick_rate / HZ, TIMER_COUNT(IO_ADDRESS(GEMINI_TIMER2_BASE)));
87 __raw_writel(tick_rate / HZ, TIMER_LOAD(IO_ADDRESS(GEMINI_TIMER2_BASE)));
88 __raw_writel(TIMER_2_CR_ENABLE | TIMER_2_CR_INT, TIMER_CR(IO_ADDRESS(GEMINI_TIMER_BASE)));
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/mach-lpc32xx/include/mach/
H A Dhardware.h28 #define IO_ADDRESS(x) (((((x) & 0xff000000) >> 4) | ((x) & 0xfffff)) |\ macro
31 #define io_p2v(x) ((void __iomem *) (unsigned long) IO_ADDRESS(x))
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/mach-tegra/
H A Dirq.c32 gic_dist_init(0, IO_ADDRESS(TEGRA_ARM_INT_DIST_BASE), 29);
33 gic_cpu_init(0, IO_ADDRESS(TEGRA_ARM_PERIF_BASE + 0x100));
H A Dplatsmp.c33 static void __iomem *scu_base = IO_ADDRESS(TEGRA_ARM_PERIF_BASE);
36 (IO_ADDRESS(TEGRA_EXCEPTION_VECTORS_BASE) + 0x100)
38 (IO_ADDRESS(TEGRA_CLK_RESET_BASE) + 0x4c)
40 (IO_ADDRESS(TEGRA_CLK_RESET_BASE) + 0x344)
51 gic_cpu_init(0, IO_ADDRESS(TEGRA_ARM_PERIF_BASE) + 0x100);
91 writel(0, IO_ADDRESS(TEGRA_FLOW_CTRL_BASE) + 0x14);
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/mach-gemini/include/mach/
H A Ddebug-macro.S18 ldrne \rx, =IO_ADDRESS(GEMINI_UART_BASE) @ virtual
H A Dsystem.h34 IO_ADDRESS(GEMINI_GLOBAL_BASE) + GLOBAL_RESET);
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/mach-nomadik/include/mach/
H A Dhardware.h33 #define IO_ADDRESS(x) ((x) - NOMADIK_IO_PHYSICAL + NOMADIK_IO_VIRTUAL) macro
86 #define NOMADIK_FSMC_VA IO_ADDRESS(NOMADIK_FSMC_BASE)
87 #define NOMADIK_MTU0_VA IO_ADDRESS(NOMADIK_MTU0_BASE)
88 #define NOMADIK_MTU1_VA IO_ADDRESS(NOMADIK_MTU1_BASE)
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/mach-tegra/include/mach/
H A Dsystem.h33 void __iomem *reset = IO_ADDRESS(TEGRA_CLK_RESET_BASE + 0x04);
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/mach-davinci/include/mach/
H A Dhardware.h36 #define IO_ADDRESS(pa) IOMEM(__IO_ADDRESS(pa)) macro

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