Searched refs:GPDR (Results 1 - 24 of 24) sorted by relevance

/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/mach-sa1100/
H A Dgpio.c36 GPDR &= ~GPIO_GPIO(offset);
47 GPDR |= GPIO_GPIO(offset);
H A Dpleb.c121 GPDR |= GPIO_UART_TXD;
122 GPDR &= ~GPIO_UART_RXD;
133 GPDR |= GPIO_ETH0_EN; /* set to output */
136 GPDR &= ~GPIO_ETH0_IRQ;
H A Dbadge4.c154 GPDR &= ~BADGE4_GPIO_INT_VID;
155 GPDR |= (BADGE4_GPIO_LGP2 | BADGE4_GPIO_LGP3 |
164 GPDR |= (BADGE4_GPIO_SDSDA | BADGE4_GPIO_SDSCL);
168 GPDR |= (BADGE4_GPIO_UART_HS1 | BADGE4_GPIO_UART_HS2);
172 GPDR |= BADGE4_GPIO_MUXSEL0;
175 GPDR &= ~(BADGE4_GPIO_TESTPT_J5 | BADGE4_GPIO_TESTPT_J6);
177 GPDR |= BADGE4_GPIO_TESTPT_J7;
181 GPDR |= BADGE4_GPIO_PCMEN5V;
184 //GPDR |= (BADGE4_GPIO_SDTYP1 | BADGE4_GPIO_SDTYP0);
191 //GPDR |
[all...]
H A Dclock.c31 GPDR |= GPIO_32_768kHz;
38 GPDR &= ~GPIO_32_768kHz;
H A Dlart.c58 GPDR |= GPIO_UART_TXD;
59 GPDR &= ~GPIO_UART_RXD;
H A Dpm.c62 SAVE(GPDR);
97 RESTORE(GPDR);
H A Dleds-lart.c39 GPDR |= LED_23;
H A Dshannon.c75 GPDR |= GPIO_UART_TXD | SHANNON_GPIO_CODEC_RESET;
76 GPDR &= ~GPIO_UART_RXD;
H A Dassabet.c212 GPDR |= GPIO_GPIO16;
221 GPDR |= GPIO_SSP_TXD | GPIO_SSP_SCLK | GPIO_SSP_SFRM;
293 GPDR |= 0x3fc; /* Configure GPIO 9:2 as outputs */
295 GPDR &= ~(0x3fc); /* Configure GPIO 9:2 as inputs */
298 GPDR |= 0x3fc; /* restore correct pin direction */
H A Dgeneric.c427 GPDR = (GPDR & ~GPIO_MBREQ) | GPIO_MBGNT;
446 GPDR = (GPDR & ~GPIO_MBREQ) | GPIO_MBGNT;
H A Dleds-badge4.c42 GPDR |= LED_MASK;
H A Dleds-hackkit.c40 GPDR |= LED_MASK;
H A Dsimpad.c155 GPDR |= GPIO_UART_TXD | GPIO_LDD13 | GPIO_LDD15;
156 GPDR &= ~GPIO_UART_RXD;
H A Dcerf.c120 /* set some GPDR bits here while it's safe */
121 GPDR |= CERF_GPIO_CF_RESET;
H A Dcollie.c319 GPDR = GPIO_LDD8 | GPIO_LDD9 | GPIO_LDD10 | GPIO_LDD11 | GPIO_LDD12 |
H A Dh3xxx.c311 GPDR = 0; /* Configure all GPIOs as input */
H A Djornada720.c258 GPDR |= GPIO_GPIO20; /* Clear gpio20 pin as input */
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/mach-mmp/include/mach/
H A Dgpio.h31 #define GPDR(x) GPIO_REG(BANK_OFF(gpio_to_bank(x)) + 0x0c) macro
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/mach-pxa/
H A Dmfp-pxa2xx.c70 GPDR(gpio) |= mask;
72 GPDR(gpio) &= ~mask;
348 (GPDR(i) & GPIO_bit(i))) {
360 saved_gpdr[i] = GPDR(i * 32);
363 GPDR(i * 32) = gpdr_lpm[i];
375 GPDR(i * 32) = saved_gpdr[i];
410 gpdr_lpm[i] = GPDR(i * 32);
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/mach-pxa/include/mach/
H A Dgpio.h93 #define GPDR(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x0c) macro
130 int dir = GPDR(gpio) & GPIO_bit(gpio);
137 return GPDR(gpio) & GPIO_bit(gpio);
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/gpio/
H A Dlangwell_gpio.c39 * structure, to get a bit offset for a pin (use GPDR as an example):
44 * reg_addr = reg_base + GPDR * nreg * 4 + reg * 4;
46 * so the bit of reg_addr is to control pin offset's GPDR feature
51 GPDR, /* pin direction */ enumerator in enum:GPIO_REG
101 void __iomem *gpdr = gpio_reg(chip, offset, GPDR);
117 void __iomem *gpdr = gpio_reg(chip, offset, GPDR);
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/pcmcia/
H A Dsa1100_shannon.c26 GPDR &= ~(SHANNON_GPIO_EJECT_0 | SHANNON_GPIO_EJECT_1 |
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/video/
H A Dsa1100fb.c987 GPDR |= mask;
1012 GPDR |= SHANNON_GPIO_DISP_EN;
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/mach-sa1100/include/mach/
H A DSA-1100.h1104 * GPDR General-Purpose Input/Output (GPIO) Pin Direction
1124 #define GPDR __REG(0x90040004) /* GPIO Pin Direction Reg. */ macro

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