Searched refs:DIV6_SPU (Results 1 - 3 of 3) sorted by relevance

/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/mach-shmobile/
H A Dclock-sh7367.c198 enum { DIV6_SUB, DIV6_SIUA, DIV6_SIUB, DIV6_MSU, DIV6_SPU, enumerator in enum:__anon8037
208 [DIV6_SPU] = SH_CLK_DIV6(&pllc1_div2_clk, SPUCKCR, 0),
242 [SYMSTP023] = MSTP(&div6_clks[DIV6_SPU], SYMSTPCR0, 23, 0), /* SPU1 */
295 CLKDEV_CON_ID("spu_clk", &div6_clks[DIV6_SPU]),
H A Dclock-sh7377.c209 DIV6_FSI, DIV6_SUB, DIV6_SPU, DIV6_MSU, DIV6_MVI3, DIV6_HDMI, enumerator in enum:__anon8044
221 [DIV6_SPU] = SH_CLK_DIV6(&pllc1_div2_clk, SPUCKCR, 0),
251 [MSTP223] = MSTP(&div6_clks[DIV6_SPU], SMSTPCR2, 23, 0), /* SPU2 */
308 CLKDEV_CON_ID("spu_clk", &div6_clks[DIV6_SPU]),
H A Dclock-sh7372.c360 DIV6_FSIA, DIV6_FSIB, DIV6_SUB, DIV6_SPU, enumerator in enum:__anon8040
373 [DIV6_SPU] = SH_CLK_DIV6(&pllc1_div2_clk, SPUCKCR, 0),
423 [MSTP223] = MSTP(&div6_clks[DIV6_SPU], SMSTPCR2, 23, 0), /* SPU2 */
432 [MSTP328] = MSTP(&div6_clks[DIV6_SPU], SMSTPCR3, 28, 0), /* FSIA */
489 CLKDEV_CON_ID("spu_clk", &div6_clks[DIV6_SPU]),

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