Searched refs:DIV4_U (Results 1 - 5 of 5) sorted by relevance
| /netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/sh/kernel/cpu/sh4a/ |
| H A D | clock-sh7722.c | 120 enum { DIV4_I, DIV4_U, DIV4_SH, DIV4_B, DIV4_B3, DIV4_P, DIV4_NR }; enumerator in enum:__anon10261
124 [DIV4_U] = DIV4(FRQCR, 16, 0x1fff, CLK_ENABLE_ON_INIT),
151 SH_HWBLK_CLK(HWBLK_URAM, &div4_clks[DIV4_U], CLK_ENABLE_ON_INIT),
189 CLKDEV_CON_ID("umem_clk", &div4_clks[DIV4_U]),
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| H A D | clock-sh7785.c | 66 enum { DIV4_I, DIV4_U, DIV4_SH, DIV4_B, DIV4_DDR, DIV4_GA, enumerator in enum:__anon10271
79 [DIV4_U] = DIV4(24, 0x000c, CLK_ENABLE_ON_INIT),
133 CLKDEV_CON_ID("umem_clk", &div4_clks[DIV4_U]),
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| H A D | clock-sh7366.c | 117 enum { DIV4_I, DIV4_U, DIV4_SH, DIV4_B, DIV4_B3, DIV4_P, enumerator in enum:__anon10258
125 [DIV4_U] = DIV4(FRQCR, 16, 0x1fff, CLK_ENABLE_ON_INIT),
206 CLKDEV_CON_ID("umem_clk", &div4_clks[DIV4_U]),
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| H A D | clock-sh7343.c | 114 enum { DIV4_I, DIV4_U, DIV4_SH, DIV4_B, DIV4_B3, DIV4_P, enumerator in enum:__anon10255
122 [DIV4_U] = DIV4(FRQCR, 16, 0x1fff, CLK_ENABLE_ON_INIT),
154 [MSTP028] = MSTP(&div4_clks[DIV4_U], MSTPCR0, 28, CLK_ENABLE_ON_INIT),
208 CLKDEV_CON_ID("umem_clk", &div4_clks[DIV4_U]),
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| H A D | clock-sh7723.c | 118 enum { DIV4_I, DIV4_U, DIV4_SH, DIV4_B, DIV4_B3, DIV4_P, DIV4_NR }; enumerator in enum:__anon10265
125 [DIV4_U] = DIV4(FRQCR, 16, 0x0dbf, CLK_ENABLE_ON_INIT),
214 CLKDEV_CON_ID("umem_clk", &div4_clks[DIV4_U]),
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