Searched refs:CSR (Results 1 - 13 of 13) sorted by relevance

/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/mach-msm/
H A Dio.c42 MSM_DEVICE(CSR),
76 MSM_DEVICE(CSR),
106 MSM_DEVICE(CSR),
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/i2c/busses/
H A Di2c-nuc900.c37 #define CSR 0x00 macro
44 /* nuc900 i2c CSR register bits */
118 tmp = readl(i2c->regs + CSR);
119 writel(tmp & ~IRQEN, i2c->regs + CSR);
126 tmp = readl(i2c->regs + CSR);
127 writel(tmp | IRQEN, i2c->regs + CSR);
362 status = readl(i2c->regs + CSR);
363 writel(status | IRQFLAG, i2c->regs + CSR);
398 ((readl(i2c->regs + CSR) & I2CBUSY) == 0)) {
457 iicstat = readl(i2c->regs + CSR);
[all...]
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/scsi/aacraid/
H A Daacraid.h631 #define sa_readw(AEP, CSR) readl(&((AEP)->regs.sa->CSR))
632 #define sa_readl(AEP, CSR) readl(&((AEP)->regs.sa->CSR))
633 #define sa_writew(AEP, CSR, value) writew(value, &((AEP)->regs.sa->CSR))
634 #define sa_writel(AEP, CSR, value) writel(value, &((AEP)->regs.sa->CSR))
693 #define rx_readb(AEP, CSR) readb(&((AEP)->regs.rx->CSR))
[all...]
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/dma/
H A Dtxx9dmac.c304 " SAIR: %#x DAIR: %#x CCR: %#x CSR: %#x\n",
312 channel64_readl(dc, CSR));
316 " SAIR: %#x DAIR: %#x CCR: %#x CSR: %#x\n",
324 channel32_readl(dc, CSR));
356 if (channel_readl(dc, CSR) & TXX9_DMA_CSR_XFACT) {
366 channel64_writel(dc, CSR, 0xffffffff);
387 channel32_writel(dc, CSR, 0xffffffff);
524 desc->SAIR, desc->DAIR, desc->CCR, desc->CSR);
537 d->SAIR, d->DAIR, d->CCR, d->CSR);
563 channel_writel(dc, CSR, error
[all...]
H A Dtxx9dmac.h81 TXX9_DMA_REG32(CSR); /* Channel Status Register */
91 u32 CSR; member in struct:txx9dmac_cregs32
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/net/qlge/
H A Dqlge_mpi.c8 tmp = ql_read32(qdev, CSR);
12 ql_write32(qdev, CSR, CSR_CMD_CLR_PAUSE);
22 ql_write32(qdev, CSR, CSR_CMD_SET_PAUSE);
24 tmp = ql_read32(qdev, CSR);
39 ql_write32(qdev, CSR, CSR_CMD_SET_RST);
41 tmp = ql_read32(qdev, CSR);
43 ql_write32(qdev, CSR, CSR_CMD_CLR_RST);
174 if (ql_read32(qdev, CSR) & CSR_HRI)
193 ql_write32(qdev, CSR, CSR_CMD_SET_H2R_INT);
516 ql_write32(qdev, CSR, CSR_CMD_CLR_R2PCI_IN
[all...]
H A Dqlge.h195 * Host Command Status Register (CSR) bit definitions.
801 CSR = 0x14, enumerator in enum:__anon13134
H A Dqlge_dbg.c1470 DUMP_REG(qdev, CSR);
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/plat-omap/
H A Ddma.c631 /* Clear CSR */
633 status = dma_read(CSR(lch));
635 dma_write(OMAP2_DMA_CSR_CLEAR_MASK, CSR(lch));
803 /* Clear the CSR register and IRQ status register */
804 dma_write(OMAP2_DMA_CSR_CLEAR_MASK, CSR(free_ch));
834 /* Clear the CSR register and IRQ status register */
835 dma_write(OMAP2_DMA_CSR_CLEAR_MASK, CSR(lch));
937 l = dma_read(CSR(lch));
1879 csr = dma_read(CSR(ch));
1888 "%d (CSR
[all...]
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/net/tokenring/
H A Dsmctr.c698 outb((tp->trc_mask | CSR_CLRTINT), dev->base_addr + CSR);
833 outb(tp->trc_mask, ioaddr + CSR);
845 outb(tp->trc_mask, ioaddr + CSR);
882 outb(tp->trc_mask, ioaddr + CSR);
911 outb(tp->trc_mask, ioaddr + CSR);
918 outb(tp->trc_mask, ioaddr + CSR);
4310 outb(tp->trc_mask | CSR_CLRTINT | CSR_CLRCBUSY, ioaddr + CSR);
5137 outb((tp->trc_mask | CSR_CA), ioaddr + CSR);
5138 outb(tp->trc_mask, ioaddr + CSR);
5616 r = inb(ioaddr + CSR);
[all...]
H A Dsmctr.h741 #define CSR 0x10 macro
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/serial/
H A Dsc26xx.c478 WRITE_SC_PORT(port, CSR, csr);
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/blackfin/include/asm/
H A Dbfin_can.h113 #define CSR 0x0040 /* CAN Suspend Mode Request */ macro

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