Searched refs:CR96 (Results 1 - 7 of 7) sorted by relevance
| /netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/net/wireless/zd1211rw/ |
| H A D | zd_rf_rf2959.c | 71 { CR95, 0x00 }, { CR96, 0x40 }, { CR97, 0x37 },
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| H A D | zd_chip.c | 610 { CR94, 0x00 }, { CR95, 0x00 }, { CR96, 0xff },
626 { CR94, 0x01 }, { CR95, 0x00 }, { CR96, 0x50 },
705 { CR96, 0x50 }, { CR97, 0x37 }, { CR98, 0x35 },
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| H A D | zd_chip.h | 175 #define CR96 CTL_REG(0x0180) macro
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| /netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/video/via/ |
| H A D | viamode.c | 135 {VIACR, CR96, 0xFF, 0x00},
199 {VIACR, CR96, 0xFF, 0x00},
256 {VIACR, CR96, 0xFF, 0x03}, /* DVP0 ; DVP0 Clock Skew */
311 {VIACR, CR96, 0xFF, 0x00},
364 {VIACR, CR96, 0xFF, 0x00},
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| H A D | hw.c | 889 viafb_write_reg_mask(CR96, VIACR, 0x03,
892 viafb_write_reg_mask(CR96, VIACR, 0x07,
899 viafb_write_reg_mask(CR96, VIACR, 0x07,
965 viafb_write_reg_mask(CR96, VIACR, 0x00, BIT4);
969 viafb_write_reg_mask(CR96, VIACR, 0x10, BIT4);
1000 viafb_write_reg_mask(CR96, VIACR, 0x00, BIT4);
1004 viafb_write_reg_mask(CR96, VIACR, 0x10, BIT4);
1067 viafb_write_reg_mask(CR96, VIACR, 0x00, BIT4);
1070 viafb_write_reg_mask(CR96, VIACR, 0x10, BIT4);
1089 viafb_write_reg_mask(CR96, VIAC
[all...] |
| H A D | share.h | 244 #define CR96 0x96 macro
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| H A D | viafbdev.c | 1079 * DVP1Driving, DFPHigh, DFPLow CR96, SR2A[5], SR1B[1], SR2A[4], SR1E[2],
1091 dvp0 = viafb_read_reg(VIACR, CR96) & 0x0f;
1122 viafb_write_reg_mask(CR96, VIACR,
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Completed in 77 milliseconds