Searched refs:CR67 (Results 1 - 10 of 10) sorted by relevance

/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/video/via/
H A Dlcdtbl.h46 {VIACR, CR66, 0xFF, 0xD6}, {VIACR, CR67, 0x03, 0x00},
65 {VIACR, CR66, 0xFF, 0xF5}, {VIACR, CR67, 0x03, 0x00},
84 {VIACR, CR66, 0xFF, 0xE1}, {VIACR, CR67, 0x03, 0x00},
103 {VIACR, CR66, 0xFF, 0xF0}, {VIACR, CR67, 0x03, 0x00},
122 {VIACR, CR66, 0xFF, 0xFA}, {VIACR, CR67, 0x03, 0x00},
143 {VIACR, CR66, 0xFF, 0xB4}, {VIACR, CR67, 0x03, 0x00},
163 {VIACR, CR66, 0xFF, 0xBE}, {VIACR, CR67, 0x03, 0x00},
184 {VIACR, CR66, 0xFF, 0xDA}, {VIACR, CR67, 0x03, 0x00},
201 {VIACR, CR66, 0xFF, 0xF5}, {VIACR, CR67, 0x03, 0x00},
218 {VIACR, CR66, 0xFF, 0xE1}, {VIACR, CR67,
[all...]
H A Dlcd.c517 cr67 = viafb_read_reg(VIACR, CR67) & 0xFC;
521 viafb_write_reg(CR67, VIACR, cr67);
525 cr67 = viafb_read_reg(VIACR, CR67) & 0xF3;
527 viafb_write_reg(CR67, VIACR, cr67);
H A Dshare.h197 #define CR67 0x67 macro
H A Dhw.c397 {IGA2_FETCH_COUNT_REG_NUM, {{CR65, 0, 7}, {CR67, 2, 3} } }
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/video/savage/
H A Dsavagefb_driver.c606 reg->CR67 = vga_in8(0x3d5, par);
759 vga_out8(0x3d5, reg->CR67, par);
1018 /* We need to set CR67 whether or not we use the BIOS. */
1021 reg->CR67 = 0x00;
1026 reg->CR67 = 0x10; /* 8bpp, 2 pixels/clock */
1028 reg->CR67 = 0x00; /* 8bpp, 1 pixel/clock */
1033 reg->CR67 = 0x30; /* 15bpp, 2 pixel/clock */
1035 reg->CR67 = 0x20; /* 15bpp, 1 pixels/clock */
1040 reg->CR67 = 0x50; /* 16bpp, 2 pixel/clock */
1042 reg->CR67
[all...]
H A Dsavagefb.h167 unsigned char CR60, CR63, CR65, CR66, CR67, CR68, CR69, CR6D, CR6F; member in struct:savage_reg
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/net/wireless/zd1211rw/
H A Dzd_rf_al2230.c238 { CR66, 0x00 }, { CR67, 0x00 }, { CR68, 0x00 },
H A Dzd_rf_al7230b.c228 { CR66, 0x00 }, { CR67, 0x00 }, { CR68, 0x00 },
H A Dzd_chip.c601 { CR67, 0xc9 }, { CR68, 0x88 }, { CR69, 0x41 },
694 { CR67, 0xc9 }, { CR68, 0x88 }, { CR69, 0x41 },
1158 ioreqs[0].addr = CR67;
H A Dzd_chip.h146 #define CR67 CTL_REG(0x010C) /* OFDM 36M calibration */ macro

Completed in 168 milliseconds