Searched refs:CPLB_USER_RD (Results 1 - 6 of 6) sorted by relevance

/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/blackfin/include/asm/
H A Dcplb.h12 #define SDRAM_IGENERIC (CPLB_L1_CHBL | CPLB_USER_RD | CPLB_VALID | CPLB_PORTPRIO)
14 #define L1_IMEMORY ( CPLB_USER_RD | CPLB_VALID | CPLB_LOCK)
15 #define SDRAM_INON_CHBL ( CPLB_USER_RD | CPLB_VALID)
23 #define CPLB_COMMON (CPLB_DIRTY | CPLB_SUPV_WR | CPLB_USER_WR | CPLB_USER_RD | CPLB_VALID | ANOMALY_05000158_WORKAROUND)
47 # define L2_IMEMORY (CPLB_L1_CHBL | CPLB_USER_RD | CPLB_VALID | PAGE_SIZE_1MB)
49 # define L2_IMEMORY ( CPLB_USER_RD | CPLB_VALID | PAGE_SIZE_1MB)
98 #define CPLB_INOCACHE CPLB_USER_RD | CPLB_VALID
H A Dpgtable.h59 #define _PAGE_RD (CPLB_USER_RD)
61 #define _PAGE_USER (CPLB_USER_RD | CPLB_USER_WR)
H A Ddef_LPBlackfin.h605 #define CPLB_USER_RD 0x00000004 /* 0=no read access, 1=read access macro
641 #define CPLB_ALL_ACCESS CPLB_SUPV_WR | CPLB_USER_RD | CPLB_USER_WR
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/blackfin/kernel/cplb-mpu/
H A Dcplbinit.c49 icplb_tbl[cpu][i_i++].data = CPLB_VALID | i_cache | CPLB_USER_RD | PAGE_SIZE_1KB;
60 icplb_tbl[cpu][i_i++].data = i_data | (addr == 0 ? CPLB_USER_RD : 0);
67 dcplb_tbl[cpu][i_d++].data = d_data | CPLB_USER_RD;
69 icplb_tbl[cpu][i_i++].data = i_data | CPLB_USER_RD;
H A Dcplbmgr.c130 d_data |= CPLB_USER_RD;
140 d_data |= CPLB_USER_RD | CPLB_USER_WR;
151 d_data |= CPLB_USER_RD;
230 i_data |= CPLB_USER_RD;
241 i_data |= CPLB_USER_RD;
261 i_data |= CPLB_USER_RD;
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/blackfin/kernel/
H A Dcplbinfo.c56 (data & CPLB_USER_RD) ? 'Y' : 'N',

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