Searched refs:CLK_TYPE_PRIMARY (Results 1 - 5 of 5) sorted by relevance

/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/mach-at91/
H A Dclock.h9 #define CLK_TYPE_PRIMARY 0x1 macro
H A Dclock.c41 #define clk_is_primary(x) ((x)->type & CLK_TYPE_PRIMARY)
87 .type = CLK_TYPE_PRIMARY,
93 .type = CLK_TYPE_PRIMARY,
100 .type = CLK_TYPE_PRIMARY | CLK_TYPE_PLL,
126 .type = CLK_TYPE_PRIMARY | CLK_TYPE_PLL,
707 utmi_clk.type |= CLK_TYPE_PRIMARY;
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/mach-bcmring/
H A Dclock.h16 #define CLK_TYPE_PRIMARY 1 /* primary clock must NOT have a parent */ macro
H A Dcore.c81 .type = CLK_TYPE_PRIMARY | CLK_TYPE_PLL1,
96 .type = CLK_TYPE_PRIMARY,
H A Dclock.c33 #define clk_is_primary(x) ((x)->type & CLK_TYPE_PRIMARY)

Completed in 52 milliseconds