Searched refs:CLK_DIV (Results 1 - 3 of 3) sorted by relevance
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/plat-brcm/include/mach/ |
H A D | clkdev.h | 20 CLK_XTAL, CLK_GATE, CLK_PLL, CLK_DIV, CLK_PHA enumerator in enum:clk::__anon8087
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/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/plat-brcm/ |
H A D | bcm5301x_dmu.c | 122 if( clk->parent == NULL || clk->type != CLK_DIV ) 175 { .ops = &lcpll_chan_ops, .parent = &clk_lcpll, .type = CLK_DIV, 177 { .ops = &lcpll_chan_ops, .parent = &clk_lcpll, .type = CLK_DIV, 179 { .ops = &lcpll_chan_ops, .parent = &clk_lcpll, .type = CLK_DIV, 181 { .ops = &lcpll_chan_ops, .parent = &clk_lcpll, .type = CLK_DIV, 244 if( clk->parent == NULL || clk->type != CLK_DIV ) 332 { .ops = &genpll_chan_ops, .parent = &clk_genpll, .type = CLK_DIV, 334 { .ops = &genpll_chan_ops, .parent = &clk_genpll, .type = CLK_DIV, 336 { .ops = &genpll_chan_ops, .parent = &clk_genpll, .type = CLK_DIV, 338 { .ops = &genpll_chan_ops, .parent = &clk_genpll, .type = CLK_DIV, [all...] |
H A D | iproc_cru.c | 259 if( clk->type != CLK_DIV) 340 { .ops = &a9pll_chan_ops, .type = CLK_DIV, .parent = &clk_a9pll[0], 342 { .ops = &a9pll_chan_ops, .type = CLK_DIV, .parent = &clk_a9chan[0], 344 { .ops = &a9pll_chan_ops, .type = CLK_DIV, .parent = &clk_a9chan[0], 346 { .ops = &a9pll_chan_ops, .type = CLK_DIV, .parent = &clk_a9chan[0], 348 { .ops = &a9pll_chan_ops, .type = CLK_DIV, .parent = &clk_a9chan[0],
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