Searched refs:CCR (Results 1 - 25 of 38) sorted by relevance

12

/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/sh/mm/
H A Dcache-shx3.c22 ccr = __raw_readl(CCR);
43 writel_uncached(ccr, CCR);
H A Dcache-sh2.c66 ccr = __raw_readl(CCR);
68 __raw_writel(ccr, CCR);
H A Dcache-sh2a.c81 __raw_writel(__raw_readl(CCR) | CCR_OCACHE_INVALIDATE, CCR);
H A Dcache-debugfs.c39 ccr = __raw_readl(CCR);
H A Dcache-sh4.c135 ccr = __raw_readl(CCR);
137 __raw_writel(ccr, CCR);
H A Dcache.c286 #ifdef CCR
287 cache_disabled = !(__raw_readl(CCR) & CCR_CACHE_ENABLE);
/netgear-R7000-V1.0.7.12_1.2.5/ap/gpl/curl/curl-7.36.0/src/
H A DMakefile.vc10116 CCR = cl.exe $(RTLIB) /O2 /DNDEBUG
357 $(CCR) $(CFLAGS) /Fo"$@" ../lib/nonblock.c
359 $(CCR) $(CFLAGS) /Fo"$@" ../lib/rawstr.c
361 $(CCR) $(CFLAGS) /Fo"$@" ../lib/strtoofft.c
363 $(CCR) $(CFLAGS) /Fo"$@" tool_binmode.c
365 $(CCR) $(CFLAGS) /Fo"$@" tool_bname.c
367 $(CCR) $(CFLAGS) /Fo"$@" tool_cb_dbg.c
369 $(CCR) $(CFLAGS) /Fo"$@" tool_cb_hdr.c
371 $(CCR) $(CFLAGS) /Fo"$@" tool_cb_prg.c
373 $(CCR)
[all...]
H A DMakefile.vc6116 CCR = cl.exe $(RTLIB) /O2 /DNDEBUG
357 $(CCR) $(CFLAGS) /Fo"$@" ../lib/nonblock.c
359 $(CCR) $(CFLAGS) /Fo"$@" ../lib/rawstr.c
361 $(CCR) $(CFLAGS) /Fo"$@" ../lib/strtoofft.c
363 $(CCR) $(CFLAGS) /Fo"$@" tool_binmode.c
365 $(CCR) $(CFLAGS) /Fo"$@" tool_bname.c
367 $(CCR) $(CFLAGS) /Fo"$@" tool_cb_dbg.c
369 $(CCR) $(CFLAGS) /Fo"$@" tool_cb_hdr.c
371 $(CCR) $(CFLAGS) /Fo"$@" tool_cb_prg.c
373 $(CCR)
[all...]
H A DMakefile.vc8116 CCR = cl.exe $(RTLIB) /O2 /DNDEBUG
357 $(CCR) $(CFLAGS) /Fo"$@" ../lib/nonblock.c
359 $(CCR) $(CFLAGS) /Fo"$@" ../lib/rawstr.c
361 $(CCR) $(CFLAGS) /Fo"$@" ../lib/strtoofft.c
363 $(CCR) $(CFLAGS) /Fo"$@" tool_binmode.c
365 $(CCR) $(CFLAGS) /Fo"$@" tool_bname.c
367 $(CCR) $(CFLAGS) /Fo"$@" tool_cb_dbg.c
369 $(CCR) $(CFLAGS) /Fo"$@" tool_cb_hdr.c
371 $(CCR) $(CFLAGS) /Fo"$@" tool_cb_prg.c
373 $(CCR)
[all...]
H A DMakefile.vc9116 CCR = cl.exe $(RTLIB) /O2 /DNDEBUG
357 $(CCR) $(CFLAGS) /Fo"$@" ../lib/nonblock.c
359 $(CCR) $(CFLAGS) /Fo"$@" ../lib/rawstr.c
361 $(CCR) $(CFLAGS) /Fo"$@" ../lib/strtoofft.c
363 $(CCR) $(CFLAGS) /Fo"$@" tool_binmode.c
365 $(CCR) $(CFLAGS) /Fo"$@" tool_bname.c
367 $(CCR) $(CFLAGS) /Fo"$@" tool_cb_dbg.c
369 $(CCR) $(CFLAGS) /Fo"$@" tool_cb_hdr.c
371 $(CCR) $(CFLAGS) /Fo"$@" tool_cb_prg.c
373 $(CCR)
[all...]
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/sh/include/cpu-sh2/cpu/
H A Dcache.h21 #define CCR 0xffffffec macro
24 #define CCR_CACHE_WT 0x02 /* CCR[bit1=1,bit2=1] */
28 #define CCR_CACHE_CB 0x04 /* CCR[bit1=0,bit2=0] */
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/sh/include/cpu-sh2a/cpu/
H A Dcache.h20 #define CCR 0xfffc1000 /* CCR1 */ macro
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/sh/include/cpu-sh3/cpu/
H A Dcache.h20 #define CCR 0xffffffec /* Address of Cache Control Register */ macro
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/sh/include/cpu-sh4/cpu/
H A Dcache.h20 #define CCR 0xff00001c /* Address of Cache Control Register */ macro
34 /* Default CCR setup: 8k+16k-byte cache,P1-wb,enable */
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/plat-omap/
H A Ddma.c251 ccr = dma_read(CCR(lch));
256 dma_write(ccr, CCR(lch));
275 ccr = dma_read(CCR(lch));
279 dma_write(ccr, CCR(lch));
291 val = dma_read(CCR(lch));
316 dma_write(val, CCR(lch));
362 val = dma_read(CCR(lch));
377 dma_write(val, CCR(lch));
427 l = dma_read(CCR(lch));
430 dma_write(l, CCR(lc
[all...]
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/dma/
H A Dtxx9dmac.h80 TXX9_DMA_REG32(CCR); /* Channel Control Register */
90 u32 CCR; member in struct:txx9dmac_cregs32
282 desc->hwdesc.CCR |= TXX9_DMA_CCR_INTENT;
284 desc->hwdesc32.CCR |= TXX9_DMA_CCR_INTENT;
298 desc->hwdesc.CCR = ccr;
302 desc->hwdesc32.CCR = ccr;
H A Dtxx9dmac.c304 " SAIR: %#x DAIR: %#x CCR: %#x CSR: %#x\n",
311 channel64_readl(dc, CCR),
316 " SAIR: %#x DAIR: %#x CCR: %#x CSR: %#x\n",
323 channel32_readl(dc, CCR),
329 channel_writel(dc, CCR, TXX9_DMA_CCR_CHRST);
342 channel_writel(dc, CCR, 0);
382 channel64_writel(dc, CCR, dc->ccr);
403 channel32_writel(dc, CCR, dc->ccr);
408 channel32_writel(dc, CCR, dc->ccr);
524 desc->SAIR, desc->DAIR, desc->CCR, des
[all...]
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/clocksource/
H A Dtcb_clksrc.c96 __raw_writel(ATMEL_TC_CLKDIS, regs + ATMEL_TC_REG(2, CCR));
119 regs + ATMEL_TC_REG(2, CCR));
145 tcaddr + ATMEL_TC_REG(2, CCR));
280 __raw_writel(ATMEL_TC_CLKEN, tcaddr + ATMEL_TC_REG(0, CCR));
288 __raw_writel(ATMEL_TC_CLKEN, tcaddr + ATMEL_TC_REG(1, CCR));
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/mach-ixp2000/include/mach/
H A Dplatform.h74 unsigned long CCR; /* Clock divide */ member in struct:slowport_cfg
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/mach-ixp2000/
H A Dcore.c54 old_cfg->CCR = *IXP2000_SLOWPORT_CCR;
60 ixp2000_reg_write(IXP2000_SLOWPORT_CCR, new_cfg->CCR);
69 ixp2000_reg_write(IXP2000_SLOWPORT_CCR, old_cfg->CCR);
H A Dixdp2x00.c58 .CCR = SLOWPORT_CCR_DIV_2,
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/sh/kernel/cpu/
H A Dinit.c115 ccr = __raw_readl(CCR);
166 * Default CCR values .. enable the caches
192 __raw_writel(flags, CCR);
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/include/linux/
H A Dcd1400.h75 #define CCR 0x05 macro
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/cris/arch-v10/kernel/
H A Dkgdb.c296 P4, CCR, P6, MOF, enumerator in enum:register_name
478 else if (regno == CCR) {
481 hex2mem ((unsigned char *)&(current_reg->ccr) + (regno-CCR) * sizeof(unsigned short),
550 else if (regno == P4 || regno == CCR) {
1210 move $ccr,[reg+0x44] ; Save special register CCR
1303 move $ccr,[reg+0x44] ; Save special register CCR
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/net/can/
H A Dbfin_can.c104 bfin_write16(&reg->control, SRS | CCR);
106 bfin_write16(&reg->control, CCR);
163 bfin_write16(&reg->control, bfin_read16(&reg->control) & ~CCR);

Completed in 250 milliseconds

12