Searched refs:vddc_table (Results 1 - 10 of 10) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/radeon/
H A Dradeon_rv770_dpm.c583 if (vddc <= pi->vddc_table[i].vddc) {
584 voltage->index = pi->vddc_table[i].vddc_index;
1125 table->highSMIO[pi->vddc_table[i].vddc_index] =
1126 pi->vddc_table[i].high_smio;
1127 table->lowSMIO[pi->vddc_table[i].vddc_index] =
1128 cpu_to_be32(pi->vddc_table[i].low_smio);
1138 pi->vddc_table[i].vddc));
1142 pi->vddc_table[i].vddc_index;
1256 pi->vddc_table[i].vddc = (u16)(min + i * step);
1258 pi->vddc_table[
[all...]
H A Dci_dpm.h74 struct ci_single_dpm_table vddc_table; member in struct:ci_dpm_table
H A Drv770_dpm.h108 struct vddc_table_entry vddc_table[MAX_NO_VREG_STEPS]; member in struct:rv7xx_power_info
H A Dradeon_ci_dpm.c3476 &pi->dpm_table.vddc_table,
3512 pi->dpm_table.vddc_table.dpm_levels[i].value =
3514 pi->dpm_table.vddc_table.dpm_levels[i].param1 =
3516 pi->dpm_table.vddc_table.dpm_levels[i].enabled = true;
3518 pi->dpm_table.vddc_table.count = allowed_sclk_vddc_table->count;
3793 struct radeon_clock_voltage_dependency_table *vddc_table = local
3808 for (i = 0; i < vddc_table->count; i++) {
3809 if (requested_voltage <= vddc_table->entries[i].v) {
3810 requested_voltage = vddc_table->entries[i].v;
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/
H A Damdgpu_smu_helper.c544 struct phm_ppt_v1_clock_voltage_dependency_table *vddc_table; local
560 vddc_table = table_info->vdd_dep_on_sclk;
561 for (i = 0; i < vddc_table->count; i++) {
562 if (req_vddc <= vddc_table->entries[i].vddc) {
563 req_volt = (((uint32_t)vddc_table->entries[i].vddc) * VOLTAGE_SCALE);
H A Dsmu7_hwmgr.h109 struct smu7_single_dpm_table vddc_table; member in struct:smu7_dpm_table
H A Damdgpu_smu8_hwmgr.c448 struct phm_clock_voltage_dependency_table *vddc_table = local
470 PP_ASSERT_WITH_CODE((vddc_table->count <= SMU8_MAX_HARDWARE_POWERLEVELS),
485 (i < vddc_table->count) ? (uint8_t)vddc_table->entries[i].v : 0;
487 (i < vddc_table->count) ? vddc_table->entries[i].clk : 0;
H A Damdgpu_vega10_processpptables.c1158 const ATOM_Vega10_Voltage_Lookup_Table *vddc_table = local
1163 &pp_table_info->vddc_lookup_table, vddc_table, 8);
H A Damdgpu_smu7_hwmgr.c652 &data->dpm_table.vddc_table,
728 data->dpm_table.vddc_table.dpm_levels[i].value = allowed_vdd_mclk_table->entries[i].v;
729 data->dpm_table.vddc_table.dpm_levels[i].param1 = std_voltage_table->entries[i].Leakage;
731 data->dpm_table.vddc_table.dpm_levels[i].enabled = true;
734 data->dpm_table.vddc_table.count = allowed_vdd_sclk_table->count;
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
H A Dsi_dpm.h564 struct vddc_table_entry vddc_table[MAX_NO_VREG_STEPS]; member in struct:rv7xx_power_info

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