/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/display/dc/irq/dce120/ |
H A D | amdgpu_irq_service_dce120.c | 110 #define IRQ_REG_ENTRY(block, reg_num, reg1, mask1, reg2, mask2)\ 111 .enable_reg = SRI(reg1, block, reg_num),\ 113 block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK,\ 115 block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK,\ 116 ~block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK \ 118 .ack_reg = SRI(reg2, block, reg_num),\ 120 block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK,\ 122 block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK \ 124 #define hpd_int_entry(reg_num)\ 125 [DC_IRQ_SOURCE_HPD1 + reg_num] [all...] |
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/display/dc/irq/dcn10/ |
H A D | amdgpu_irq_service_dcn10.c | 191 #define IRQ_REG_ENTRY(block, reg_num, reg1, mask1, reg2, mask2)\ 192 .enable_reg = SRI(reg1, block, reg_num),\ 194 block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK,\ 196 block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK,\ 197 ~block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK \ 199 .ack_reg = SRI(reg2, block, reg_num),\ 201 block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK,\ 203 block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK \ 205 #define hpd_int_entry(reg_num)\ 206 [DC_IRQ_SOURCE_HPD1 + reg_num] [all...] |
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/display/dc/irq/dcn20/ |
H A D | amdgpu_irq_service_dcn20.c | 193 #define IRQ_REG_ENTRY(block, reg_num, reg1, mask1, reg2, mask2)\ 194 .enable_reg = SRI(reg1, block, reg_num),\ 196 block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK,\ 198 block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK,\ 199 ~block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK \ 201 .ack_reg = SRI(reg2, block, reg_num),\ 203 block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK,\ 205 block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK \ 209 #define hpd_int_entry(reg_num)\ 210 [DC_IRQ_SOURCE_HPD1 + reg_num] [all...] |
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/display/dc/irq/dcn21/ |
H A D | amdgpu_irq_service_dcn21.c | 189 #define IRQ_REG_ENTRY(block, reg_num, reg1, mask1, reg2, mask2)\ 190 .enable_reg = SRI(reg1, block, reg_num),\ 192 block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK,\ 194 block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK,\ 195 ~block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK \ 197 .ack_reg = SRI(reg2, block, reg_num),\ 199 block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK,\ 201 block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK \ 205 #define hpd_int_entry(reg_num)\ 206 [DC_IRQ_SOURCE_HPD1 + reg_num] [all...] |
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/display/dc/irq/dce110/ |
H A D | amdgpu_irq_service_dce110.c | 96 #define hpd_int_entry(reg_num)\ 97 [DC_IRQ_SOURCE_HPD1 + reg_num] = {\ 98 .enable_reg = mmHPD ## reg_num ## _DC_HPD_INT_CONTROL,\ 104 .ack_reg = mmHPD ## reg_num ## _DC_HPD_INT_CONTROL,\ 107 .status_reg = mmHPD ## reg_num ## _DC_HPD_INT_STATUS,\ 111 #define hpd_rx_int_entry(reg_num)\ 112 [DC_IRQ_SOURCE_HPD1RX + reg_num] = {\ 113 .enable_reg = mmHPD ## reg_num ## _DC_HPD_INT_CONTROL,\ 118 .ack_reg = mmHPD ## reg_num ## _DC_HPD_INT_CONTROL,\ 121 .status_reg = mmHPD ## reg_num ## _DC_HPD_INT_STATU [all...] |
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/display/dc/irq/dce80/ |
H A D | amdgpu_irq_service_dce80.c | 99 #define hpd_int_entry(reg_num)\ 100 [DC_IRQ_SOURCE_INVALID + reg_num] = {\ 101 .enable_reg = mmDC_HPD ## reg_num ## _INT_CONTROL,\ 107 .ack_reg = mmDC_HPD ## reg_num ## _INT_CONTROL,\ 110 .status_reg = mmDC_HPD ## reg_num ## _INT_STATUS,\ 114 #define hpd_rx_int_entry(reg_num)\ 115 [DC_IRQ_SOURCE_HPD6 + reg_num] = {\ 116 .enable_reg = mmDC_HPD ## reg_num ## _INT_CONTROL,\ 121 .ack_reg = mmDC_HPD ## reg_num ## _INT_CONTROL,\ 124 .status_reg = mmDC_HPD ## reg_num ## _INT_STATU [all...] |
/netbsd-current/external/gpl3/gdb.old/dist/gas/testsuite/gas/aarch64/ |
H A D | neon-ins.s | 23 .macro ins_mov_main reg_num type index xw_reg 24 ins v\reg_num\().\type[\index], \xw_reg\reg_num 25 mov v\reg_num\().\type[\index], \xw_reg\reg_num 28 .macro ins_mov_element reg_num type index null 29 ins v\reg_num\().\type[\index], v\reg_num\().\type[\index] 30 mov v\reg_num\().\type[\index], v\reg_num\() [all...] |
/netbsd-current/sys/dev/pci/ |
H A D | unichromehw.h | 255 int reg_num; member in struct:iga1_hor_total 261 int reg_num; member in struct:iga1_hor_addr 267 int reg_num; member in struct:iga1_hor_blank_start 273 int reg_num; member in struct:iga1_hor_blank_end 279 int reg_num; member in struct:iga1_hor_sync_start 285 int reg_num; member in struct:iga1_hor_sync_end 291 int reg_num; member in struct:iga1_ver_total 297 int reg_num; member in struct:iga1_ver_addr 303 int reg_num; member in struct:iga1_ver_blank_start 309 int reg_num; member in struct:iga1_ver_blank_end 315 int reg_num; member in struct:iga1_ver_sync_start 321 int reg_num; member in struct:iga1_ver_sync_end 332 int reg_num; member in struct:iga2_shadow_hor_total 338 int reg_num; member in struct:iga2_shadow_hor_blank_end 345 int reg_num; member in struct:iga2_shadow_ver_total 351 int reg_num; member in struct:iga2_shadow_ver_addr 357 int reg_num; member in struct:iga2_shadow_ver_blank_start 363 int reg_num; member in struct:iga2_shadow_ver_blank_end 369 int reg_num; member in struct:iga2_shadow_ver_sync_start 375 int reg_num; member in struct:iga2_shadow_ver_sync_end 385 int reg_num; member in struct:iga2_hor_total 391 int reg_num; member in struct:iga2_hor_addr 397 int reg_num; member in struct:iga2_hor_blank_start 403 int reg_num; member in struct:iga2_hor_blank_end 409 int reg_num; member in struct:iga2_hor_sync_start 415 int reg_num; member in struct:iga2_hor_sync_end 421 int reg_num; member in struct:iga2_ver_total 427 int reg_num; member in struct:iga2_ver_addr 433 int reg_num; member in struct:iga2_ver_blank_start 439 int reg_num; member in struct:iga2_ver_blank_end 445 int reg_num; member in struct:iga2_ver_sync_start 451 int reg_num; member in struct:iga2_ver_sync_end 457 int reg_num; member in struct:iga1_offset 463 int reg_num; member in struct:iga2_offset 474 int reg_num; member in struct:iga1_fetch_count 480 int reg_num; member in struct:iga2_fetch_count 491 int reg_num; member in struct:iga1_starting_addr 496 int reg_num; member in struct:iga2_starting_addr 507 int reg_num; member in struct:lcd_pwd_seq_td0 512 int reg_num; member in struct:lcd_pwd_seq_td1 517 int reg_num; member in struct:lcd_pwd_seq_td2 522 int reg_num; member in struct:lcd_pwd_seq_td3 535 int reg_num; member in struct:_lcd_hor_scaling_factor 540 int reg_num; member in struct:_lcd_ver_scaling_factor 573 int reg_num; member in struct:iga1_fifo_depth_select 578 int reg_num; member in struct:iga1_fifo_threshold_select 583 int reg_num; member in struct:iga1_fifo_high_threshold_select 588 int reg_num; member in struct:iga1_display_queue_expire_num 593 int reg_num; member in struct:iga2_fifo_depth_select 598 int reg_num; member in struct:iga2_fifo_threshold_select 603 int reg_num; member in struct:iga2_fifo_high_threshold_select 608 int reg_num; member in struct:iga2_display_queue_expire_num [all...] |
H A D | unichromefb.c | 825 regnum = iga1_crtc_reg.hor_total.reg_num; 831 regnum = iga1_crtc_reg.hor_addr.reg_num; 837 regnum = iga1_crtc_reg.hor_blank_start.reg_num; 844 regnum = iga1_crtc_reg.hor_blank_end.reg_num; 850 regnum = iga1_crtc_reg.hor_sync_start.reg_num; 857 regnum = iga1_crtc_reg.hor_sync_end.reg_num; 863 regnum = iga1_crtc_reg.ver_total.reg_num; 869 regnum = iga1_crtc_reg.ver_addr.reg_num; 875 regnum = iga1_crtc_reg.ver_blank_start.reg_num; 882 regnum = iga1_crtc_reg.ver_blank_end.reg_num; [all...] |
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/display/dc/ |
H A D | dm_services.h | 185 #define get_reg_field_value_soc15(reg_value, block, reg_num, reg_name, reg_field)\ 188 block ## reg_num ## _ ## reg_name ## __ ## reg_field ## _MASK,\ 189 block ## reg_num ## _ ## reg_name ## __ ## reg_field ## __SHIFT) 191 #define set_reg_field_value_soc15(reg_value, value, block, reg_num, reg_name, reg_field)\ 195 block ## reg_num ## _ ## reg_name ## __ ## reg_field ## _MASK,\ 196 block ## reg_num ## _ ## reg_name ## __ ## reg_field ## __SHIFT)
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/netbsd-current/external/gpl3/binutils/dist/gas/config/ |
H A D | tc-i386-intel.c | 290 int reg_num; local 299 reg_num = e->X_add_number; 301 reg_num = e->X_md - 1; 303 if (reg_num < 0 || reg_num >= (int) i386_regtab_size) 309 if (!check_register (&i386_regtab[reg_num])) 312 register_prefix, i386_regtab[reg_num].reg_name); 323 if (i386_regtab[reg_num].reg_type.bitfield.class == SReg 324 && i386_regtab[reg_num].reg_num [all...] |
/netbsd-current/external/gpl3/binutils.old/dist/gas/config/ |
H A D | tc-i386-intel.c | 263 int reg_num; local 272 reg_num = e->X_add_number; 274 reg_num = e->X_md - 1; 276 if (reg_num < 0 || reg_num >= (int) i386_regtab_size) 289 if (i386_regtab[reg_num].reg_type.bitfield.class == SReg 290 && i386_regtab[reg_num].reg_num == RegFlat) 295 i.op[this_operand].regs = i386_regtab + reg_num; 298 && (i386_regtab[reg_num] [all...] |
/netbsd-current/external/gpl3/gdb.old/dist/gas/config/ |
H A D | tc-i386-intel.c | 273 int reg_num; local 282 reg_num = e->X_add_number; 284 reg_num = e->X_md - 1; 286 if (reg_num < 0 || reg_num >= (int) i386_regtab_size) 299 if (i386_regtab[reg_num].reg_type.bitfield.class == SReg 300 && i386_regtab[reg_num].reg_num == RegFlat) 305 i.op[this_operand].regs = i386_regtab + reg_num; 308 && (i386_regtab[reg_num] [all...] |
/netbsd-current/external/gpl3/gdb.old/dist/gdb/python/ |
H A D | py-registers.c | 377 int *reg_num) 388 *reg_num = user_reg_map_name_to_regnum (gdbarch, reg_name.get (), 390 return *reg_num >= 0; 401 *reg_num = (int) value; 414 *reg_num = reg->regnum; 376 gdbpy_parse_register_id(struct gdbarch *gdbarch, PyObject *pyo_reg_id, int *reg_num) argument
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/netbsd-current/external/gpl3/gdb/dist/gdb/python/ |
H A D | py-registers.c | 371 int *reg_num) 382 *reg_num = user_reg_map_name_to_regnum (gdbarch, reg_name.get (), 384 if (*reg_num >= 0) 400 *reg_num = (int) value; 414 *reg_num = reg->regnum; 370 gdbpy_parse_register_id(struct gdbarch *gdbarch, PyObject *pyo_reg_id, int *reg_num) argument
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/netbsd-current/external/gpl3/gdb.old/dist/sim/aarch64/ |
H A D | cpustate.c | 32 #define reg_num(reg) (((reg) == R31 && !r31_is_sp) ? 32 : (reg)) macro 71 return cpu->gr[reg_num(reg)].u64; 77 return cpu->gr[reg_num(reg)].s64; 83 return cpu->gr[reg_num(reg)].u32; 89 return cpu->gr[reg_num(reg)].s32; 135 return cpu->gr[reg_num(reg)].u16; 141 return cpu->gr[reg_num(reg)].s16; 147 return cpu->gr[reg_num(reg)].u8; 153 return cpu->gr[reg_num(reg)].s8;
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/netbsd-current/external/gpl3/gdb/dist/sim/aarch64/ |
H A D | cpustate.c | 36 #define reg_num(reg) (((reg) == R31 && !r31_is_sp) ? 32 : (reg)) macro 75 return cpu->gr[reg_num(reg)].u64; 81 return cpu->gr[reg_num(reg)].s64; 87 return cpu->gr[reg_num(reg)].u32; 93 return cpu->gr[reg_num(reg)].s32; 139 return cpu->gr[reg_num(reg)].u16; 145 return cpu->gr[reg_num(reg)].s16; 151 return cpu->gr[reg_num(reg)].u8; 157 return cpu->gr[reg_num(reg)].s8;
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/netbsd-current/external/gpl3/binutils/dist/gprofng/common/ |
H A D | hwcentry.h | 109 regno_t reg_num; /* register in CPU, aka picnum, or REGNO_ANY */ member in struct:__anon512 121 regno_t *reg_list; /* if not NULL, legal values for <reg_num> field above */ 167 * <list[]->reg_num>: 267 * <pret_ctr->reg_num>: 307 * <ctr->reg_num>: 322 * Array of legal <reg_num> values. Terminated by REGNO_ANY.
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H A D | hwcdrv.c | 67 regno_t regno = entries[idx]->reg_num; 81 entries[idx]->reg_num = regno; /* assigning back to entries */ 89 if (entries[idx]->reg_num == REGNO_ANY) 104 entries[idx]->reg_num = regno; /* assigning back to entries */ 407 unsigned int reg_num; // PMC assignment, potentially for detecting conflicts member in struct:__anon501 1274 if (hwcfuncs_get_x86_eventsel (hwcdef[idx].reg_num, 1280 glb_event_def->reg_num = pmc_sel; 1288 "(min_time=%lld): reg_num=0x%x eventsel=0x%llx ireset=%lld usr=%lld sys=%lld\n", 1290 (long long) glb_event_def->min_time, (int) glb_event_def->reg_num,
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H A D | hwcfuncs.c | 164 " reg_num=%d, timecvt=%d, memop=%d, " 166 hdr, phwcdef->name, phwcdef->int_name, phwcdef->reg_num, 238 hwcdef[idx].reg_num = REGNO_ANY; 304 /* reg_num */ 317 hwcdef[idx].reg_num = reg;
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/netbsd-current/external/gpl3/gdb.old/dist/gdb/ |
H A D | hppa-tdep.c | 1610 unsigned int reg_num; 1653 reg_num = inst_saves_gr (inst); 1654 save_gr &= ~(1 << reg_num); 1666 if (reg_num >= (gdbarch_ptr_bit (gdbarch) == 64 ? 19 : 23) 1667 && reg_num <= 26) 1669 while (reg_num >= (gdbarch_ptr_bit (gdbarch) == 64 ? 19 : 23) 1670 && reg_num <= 26) 1677 reg_num = inst_saves_gr (inst); 1683 reg_num = inst_saves_fr (inst); 1684 save_fr &= ~(1 << reg_num); 1607 unsigned int reg_num; local [all...] |
/netbsd-current/external/gpl3/gdb/dist/gdb/ |
H A D | hppa-tdep.c | 1592 unsigned int reg_num; 1635 reg_num = inst_saves_gr (inst); 1636 save_gr &= ~(1 << reg_num); 1648 if (reg_num >= (gdbarch_ptr_bit (gdbarch) == 64 ? 19 : 23) 1649 && reg_num <= 26) 1651 while (reg_num >= (gdbarch_ptr_bit (gdbarch) == 64 ? 19 : 23) 1652 && reg_num <= 26) 1659 reg_num = inst_saves_gr (inst); 1665 reg_num = inst_saves_fr (inst); 1666 save_fr &= ~(1 << reg_num); 1589 unsigned int reg_num; local [all...] |
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/display/dc/gpio/dce120/ |
H A D | amdgpu_hw_factory_dce120.c | 48 #define reg_num 0 macro
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/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/display/dc/gpio/dcn10/ |
H A D | amdgpu_hw_factory_dcn10.c | 49 #define reg_num 0 macro
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/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/display/dc/gpio/dcn20/ |
H A D | amdgpu_hw_factory_dcn20.c | 55 #define reg_num 0 macro
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