Searched refs:pixel_clock (Results 1 - 25 of 60) sorted by relevance

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/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/display/dc/bios/
H A Dcommand_table.h60 uint32_t pixel_clock,
65 uint32_t pixel_clock,
H A Dcommand_table2.h60 uint32_t pixel_clock,
65 uint32_t pixel_clock,
H A Damdgpu_command_table.c246 params.usPixelClock = cpu_to_le16((uint16_t)(cntl->pixel_clock / 10));
275 params.usPixelClock = cpu_to_le16((uint16_t)(cntl->pixel_clock / 10));
298 params.ulPixelClock = cntl->pixel_clock / 10;
461 cpu_to_le16((uint16_t)(cntl->pixel_clock / 20));
467 cpu_to_le16((uint16_t)(cntl->pixel_clock / 10));
598 cpu_to_le16((uint16_t)(cntl->pixel_clock / 20));
604 cpu_to_le16((uint16_t)(cntl->pixel_clock / 10));
724 cpu_to_le16((uint16_t)(cntl->pixel_clock / 20));
730 cpu_to_le16((uint16_t)(cntl->pixel_clock / 10));
803 params.usSymClock = cpu_to_le16((uint16_t) (cntl->pixel_clock / 1
1573 dac_encoder_control_prepare_params( DAC_ENCODER_CONTROL_PS_ALLOCATION *params, bool enable, uint32_t pixel_clock, uint8_t dac_standard) argument
1591 dac1_encoder_control_v1( struct bios_parser *bp, bool enable, uint32_t pixel_clock, uint8_t dac_standard) argument
1612 dac2_encoder_control_v1( struct bios_parser *bp, bool enable, uint32_t pixel_clock, uint8_t dac_standard) argument
[all...]
H A Damdgpu_command_table2.c142 params.pclk_10khz = cntl->pixel_clock / 10;
279 ps.param.symclk_10khz = cntl->pixel_clock/10;
347 struct dmub_rb_cmd_set_pixel_clock pixel_clock = { 0 }; local
349 pixel_clock.header.type = DMUB_CMD__VBIOS;
350 pixel_clock.header.sub_type = DMUB_CMD__VBIOS_SET_PIXEL_CLOCK;
351 pixel_clock.pixel_clock.clk = *clk;
353 dc_dmub_srv_cmd_queue(dmcub, &pixel_clock.header);
H A Damdgpu_command_table_helper.c206 ctrl_param->usPixelClock = cpu_to_le16((uint16_t)(control->pixel_clock / 10));
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/display/include/
H A Dbios_parser_types.h114 uint32_t pixel_clock; /* khz */ member in struct:bp_encoder_control
127 uint32_t pixel_clock; /* in KHz */ member in struct:bp_external_encoder_control
154 uint32_t pixel_clock; member in struct:bp_transmitter_control
197 uint32_t pixel_clock; member in struct:bp_adjust_pixel_clock_parameters
/netbsd-current/sys/dev/ic/
H A Ddw_hdmi.h53 u_int pixel_clock; member in struct:dwhdmi_phy_config
60 u_int pixel_clock; member in struct:dwhdmi_mpll_config
H A Ddw_hdmi_phy.c302 for (mpll_conf = &sc->sc_mpll_config[0]; mpll_conf->pixel_clock != 0; mpll_conf++)
303 if (mode->clock <= mpll_conf->pixel_clock)
310 for (phy_conf = &sc->sc_phy_config[0]; phy_conf->pixel_clock != 0; phy_conf++)
311 if (mode->clock <= phy_conf->pixel_clock)
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
H A Damdgpu_encoders.c211 u32 pixel_clock)
231 if (pixel_clock > 340000)
236 if (pixel_clock > 165000)
253 if (pixel_clock > 340000)
258 if (pixel_clock > 165000)
210 amdgpu_dig_monitor_is_duallink(struct drm_encoder *encoder, u32 pixel_clock) argument
H A Damdgpu_atombios_encoders.c348 args.usPixelClock = cpu_to_le16(amdgpu_encoder->pixel_clock / 10);
409 if (amdgpu_dig_monitor_is_duallink(encoder, amdgpu_encoder->pixel_clock))
417 args.dvo.sDVOEncoder.usPixelClock = cpu_to_le16(amdgpu_encoder->pixel_clock / 10);
421 if (amdgpu_dig_monitor_is_duallink(encoder, amdgpu_encoder->pixel_clock))
427 args.dvo_v3.usPixelClock = cpu_to_le16(amdgpu_encoder->pixel_clock / 10);
433 args.dvo_v4.usPixelClock = cpu_to_le16(amdgpu_encoder->pixel_clock / 10);
617 args.v1.usPixelClock = cpu_to_le16(amdgpu_encoder->pixel_clock / 10);
625 else if (amdgpu_dig_monitor_is_duallink(encoder, amdgpu_encoder->pixel_clock))
652 args.v3.usPixelClock = cpu_to_le16(amdgpu_encoder->pixel_clock / 10);
660 else if (amdgpu_dig_monitor_is_duallink(encoder, amdgpu_encoder->pixel_clock))
[all...]
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/display/dc/calcs/
H A Damdgpu_dcn_calc_auto.c181 v->read_bandwidth[k] = v->swath_width_ysingle_dpp[k] * (dcn_bw_ceil2(v->byte_per_pixel_in_dety[k], 1.0) * v->v_ratio[k] +dcn_bw_ceil2(v->byte_per_pixel_in_detc[k], 2.0) / 2.0 * v->v_ratio[k] / 2) / (v->htotal[k] / v->pixel_clock[k]);
199 v->write_bandwidth[k] = v->scaler_rec_out_width[k] / (v->htotal[k] / v->pixel_clock[k]) * 4.0;
202 v->write_bandwidth[k] = v->scaler_rec_out_width[k] / (v->htotal[k] / v->pixel_clock[k]) * 1.5;
247 if (v->output[k] == dcn_bw_writeback && v->output_format[k] == dcn_bw_444 && v->scaler_rec_out_width[k] / (v->htotal[k] / v->pixel_clock[k]) * 4.0 > (v->writeback_luma_buffer_size + v->writeback_chroma_buffer_size) * 1024.0 / v->write_back_latency) {
250 else if (v->output[k] == dcn_bw_writeback && v->scaler_rec_out_width[k] / (v->htotal[k] / v->pixel_clock[k]) >dcn_bw_min2(v->writeback_luma_buffer_size, 2.0 * v->writeback_chroma_buffer_size) * 1024.0 / v->write_back_latency) {
270 v->required_output_bw = v->pixel_clock[k] / 2.0;
273 v->required_output_bw = v->pixel_clock[k];
277 v->required_output_bw = v->pixel_clock[k] * 3.0 / 2.0;
280 v->required_output_bw = v->pixel_clock[k] * 3.0;
336 v->min_dppclk_using_single_dpp[k] = v->pixel_clock[
[all...]
/netbsd-current/usr.sbin/grfconfig/
H A Dgrfconfig.c170 gv->pixel_clock = atoi(cps[1]);
194 if ((gv->pixel_clock == 0) ||
329 gv->pixel_clock / (gv->htotal * 1000),
330 (gv->pixel_clock / (gv->htotal * 100))
332 gv->pixel_clock / (gv->htotal * gv->vtotal));
372 gv->pixel_clock,
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/display/dc/inc/hw/
H A Dlink_encoder.h142 uint32_t pixel_clock);
151 uint32_t pixel_clock);
/netbsd-current/sys/external/bsd/drm2/dist/drm/radeon/
H A Dradeon_atombios_encoders.c402 args.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10);
458 args.sTVEncoder.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10);
523 if (radeon_dig_monitor_is_duallink(encoder, radeon_encoder->pixel_clock))
531 args.dvo.sDVOEncoder.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10);
535 if (radeon_dig_monitor_is_duallink(encoder, radeon_encoder->pixel_clock))
541 args.dvo_v3.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10);
547 args.dvo_v4.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10);
617 args.v1.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10);
626 if (radeon_dig_monitor_is_duallink(encoder, radeon_encoder->pixel_clock))
642 args.v2.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 1
[all...]
H A Dradeon_encoders.c376 u32 pixel_clock)
398 if (pixel_clock > 340000)
403 if (pixel_clock > 165000)
423 if (pixel_clock > 340000)
428 if (pixel_clock > 165000)
375 radeon_dig_monitor_is_duallink(struct drm_encoder *encoder, u32 pixel_clock) argument
/netbsd-current/sys/arch/arm/s3c2xx0/
H A Ds3c24x0_lcd.h84 int pixel_clock; /* in Hz */ member in struct:s3c24x0_lcd_panel_info
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/display/dc/virtual/
H A Damdgpu_virtual_link_encoder.c53 uint32_t pixel_clock) {}
48 virtual_link_encoder_enable_tmds_output( struct link_encoder *enc, enum clock_source_id clock_source, enum dc_color_depth color_depth, enum signal_type signal, uint32_t pixel_clock) argument
/netbsd-current/sys/external/bsd/drm2/dist/include/drm/
H A Ddrm_displayid.h80 u8 pixel_clock[3]; member in struct:displayid_detailed_timings_1
/netbsd-current/usr.sbin/videomode/
H A Dvideomode.c159 "pixel_clock = %lu, width = %d, height = %d, depth = %d\n",
160 vm->pixel_clock, vm->disp_width, vm->disp_height, vm->depth);
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce/
H A Damdgpu_dce_link_encoder.c925 uint32_t pixel_clock)
945 cntl.pixel_clock = pixel_clock;
961 uint32_t pixel_clock)
978 cntl.pixel_clock = pixel_clock;
1014 cntl.pixel_clock = link_settings->link_rate
1053 cntl.pixel_clock = link_settings->link_rate
1132 cntl.pixel_clock = link_settings->link_settings.link_rate *
920 dce110_link_encoder_enable_tmds_output( struct link_encoder *enc, enum clock_source_id clock_source, enum dc_color_depth color_depth, enum signal_type signal, uint32_t pixel_clock) argument
958 dce110_link_encoder_enable_lvds_output( struct link_encoder *enc, enum clock_source_id clock_source, uint32_t pixel_clock) argument
H A Ddce_link_encoder.h216 uint32_t pixel_clock);
234 uint32_t pixel_clock);
/netbsd-current/sys/arch/amiga/dev/
H A Dgrfioctl.h85 u_long pixel_clock; /* in Hz. */ member in struct:grfvideo_mode
/netbsd-current/sys/arch/atari/dev/
H A Dgrfioctl.h92 u_long pixel_clock; /* in Hz. */ member in struct:grfvideo_mode
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/display/dmub/inc/
H A Ddmub_cmd.h193 struct dmub_cmd_set_pixel_clock_data pixel_clock; member in struct:dmub_rb_cmd_set_pixel_clock
/netbsd-current/sys/external/bsd/drm2/dist/drm/i915/display/
H A Dintel_dp.h116 int intel_dp_link_required(int pixel_clock, int bpp);

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