Searched refs:performance (Results 1 - 25 of 95) sorted by relevance

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/netbsd-current/external/gpl3/gdb.old/dist/gas/testsuite/gas/hppa/basic/
H A Dperf.s4 ; PA2.0 performance monitor instruction tests
/netbsd-current/external/gpl3/gdb.old/dist/gas/testsuite/gas/mips/
H A Dperfcount.s1 # source file to test assembly of R1[20]000 performance counter instructions.
H A Dperfcount.d2 #name: MIPS R1[20]000 performance counters
/netbsd-current/external/gpl3/gdb.old/dist/gas/testsuite/gas/arm/
H A Darmv8-ar-it-bad.l2 .*:6: IT blocks containing 32-bit Thumb instructions are performance deprecated in ARMv8-A and ARMv8-R
3 .*:14: IT blocks containing more than one conditional instruction are performance deprecated in ARMv8-A and ARMv8-R
4 .*:19: IT blocks containing more than one conditional instruction are performance deprecated in ARMv8-A and ARMv8-R
5 .*:29: IT blocks containing 32-bit Thumb instructions are performance deprecated in ARMv8-A and ARMv8-R
6 .*:35: IT blocks containing more than one conditional instruction are performance deprecated in ARMv8-A and ARMv8-R
7 .*:39: IT blocks containing 16-bit Thumb instructions of the following class are performance deprecated in ARMv8-A and ARMv8-R: Short branches, Undefined, SVC, LDM/STM
8 .*:42: IT blocks containing 16-bit Thumb instructions of the following class are performance deprecated in ARMv8-A and ARMv8-R: Miscellaneous 16-bit instructions
9 .*:48: IT blocks containing 16-bit Thumb instructions of the following class are performance deprecated in ARMv8-A and ARMv8-R: Literal loads
10 .*:51: IT blocks containing 16-bit Thumb instructions of the following class are performance deprecated in ARMv8-A and ARMv8-R: Hi-register ADD, MOV, CMP, BX, BLX using pc
11 .*:54: IT blocks containing 16-bit Thumb instructions of the following class are performance deprecate
[all...]
H A Dudf.l2 ^[^:]*:16: IT blocks containing 16-bit Thumb instructions of the following class are performance deprecated in ARMv8-A and ARMv8-R: Short branches, Undefined, SVC, LDM/STM
3 ^[^:]*:21: IT blocks containing 32-bit Thumb instructions are performance deprecated in ARMv8-A and ARMv8-R
H A Dsp-pc-validations-bad-t-v8a.l2 [^:]*:27: IT blocks containing 16-bit Thumb instructions of the following class are performance deprecated in ARMv8-A and ARMv8-R: Short branches, Undefined, SVC, LDM/STM
3 [^:]*:27: IT blocks containing more than one conditional instruction are performance deprecated in ARMv8-A and ARMv8-R
5 [^:]*:28: IT blocks containing 16-bit Thumb instructions of the following class are performance deprecated in ARMv8-A and ARMv8-R: Short branches, Undefined, SVC, LDM/STM
6 [^:]*:28: IT blocks containing more than one conditional instruction are performance deprecated in ARMv8-A and ARMv8-R
8 [^:]*:29: IT blocks containing 16-bit Thumb instructions of the following class are performance deprecated in ARMv8-A and ARMv8-R: Short branches, Undefined, SVC, LDM/STM
9 [^:]*:29: IT blocks containing more than one conditional instruction are performance deprecated in ARMv8-A and ARMv8-R
11 [^:]*:30: IT blocks containing 16-bit Thumb instructions of the following class are performance deprecated in ARMv8-A and ARMv8-R: Short branches, Undefined, SVC, LDM/STM
12 [^:]*:30: IT blocks containing more than one conditional instruction are performance deprecated in ARMv8-A and ARMv8-R
14 [^:]*:31: IT blocks containing 16-bit Thumb instructions of the following class are performance deprecated in ARMv8-A and ARMv8-R: Short branches, Undefined, SVC, LDM/STM
15 [^:]*:31: IT blocks containing more than one conditional instruction are performance deprecate
[all...]
H A Darmv8-2-fp16-scalar-bad.l217 .*:110: IT blocks containing 32-bit Thumb instructions are performance deprecated in ARMv8-A and ARMv8-R
219 .*:110: IT blocks containing 32-bit Thumb instructions are performance deprecated in ARMv8-A and ARMv8-R
221 .*:110: IT blocks containing 32-bit Thumb instructions are performance deprecated in ARMv8-A and ARMv8-R
223 .*:110: IT blocks containing 32-bit Thumb instructions are performance deprecated in ARMv8-A and ARMv8-R
225 .*:110: IT blocks containing 32-bit Thumb instructions are performance deprecated in ARMv8-A and ARMv8-R
227 .*:110: IT blocks containing 32-bit Thumb instructions are performance deprecated in ARMv8-A and ARMv8-R
229 .*:110: IT blocks containing 32-bit Thumb instructions are performance deprecated in ARMv8-A and ARMv8-R
231 .*:110: IT blocks containing 32-bit Thumb instructions are performance deprecated in ARMv8-A and ARMv8-R
233 .*:110: IT blocks containing 32-bit Thumb instructions are performance deprecated in ARMv8-A and ARMv8-R
235 .*:110: IT blocks containing 32-bit Thumb instructions are performance deprecate
[all...]
/netbsd-current/external/gpl3/gcc.old/dist/libstdc++-v3/scripts/
H A Dcreate_testsuite_files36 dlist="$dlist std abi backward ext performance tr1 tr2 decimal experimental"
49 grep performance $tmp.4 > $tests_file_perf
50 grep -v performance $tmp.4 > $tmp.5
/netbsd-current/external/gpl3/gcc/dist/libstdc++-v3/scripts/
H A Dcreate_testsuite_files37 dlist="$dlist std abi backward ext performance tr1 tr2 decimal experimental"
50 grep performance $tmp.4 > $tests_file_perf
51 grep -v performance $tmp.4 > $tmp.5
/netbsd-current/external/gpl3/binutils.old/dist/gprofng/common/
H A Dcpu_frequency.h204 int performance = 0; local
205 if (strncmp (temp, "performance", sizeof ("performance") - 1) == 0)
206 performance = 1;
210 if (intel_pstate || ondemand || performance)
/netbsd-current/external/gpl3/binutils/dist/gprofng/common/
H A Dcpu_frequency.h204 int performance = 0; local
205 if (strncmp (temp, "performance", sizeof ("performance") - 1) == 0)
206 performance = 1;
210 if (intel_pstate || ondemand || performance)
/netbsd-current/external/gpl3/binutils.old/dist/gprofng/src/
H A DMakefile.am185 TEXT_GP_COLLECT_APP = "collect performance data for the target application"
187 TEXT_GP_DISPLAY_TEXT = "display the performance data in plain text format"
/netbsd-current/sys/external/isc/libsodium/dist/src/libsodium/sodium/
H A Dcore.c36 # warning work as expected, and performance is likely to be suboptimal.
/netbsd-current/crypto/external/bsd/openssl.old/lib/libcrypto/arch/arm/
H A Dsha512-armv4.S42 @ Improve NEON performance by 12% on Snapdragon S4. In absolute
/netbsd-current/crypto/external/bsd/openssl/lib/libcrypto/arch/arm/
H A Dsha512-armv4.S42 @ Improve NEON performance by 12% on Snapdragon S4. In absolute
H A Daes-armv4.S25 @ is endian-neutral. The performance is ~42 cycles/byte for 128-bit
/netbsd-current/external/lgpl3/gmp/dist/mpn/arm64/
H A Dpopcount.asm40 C * Arrange to align the pointer, if that helps performance. Use the same
41 C read-and-mask trick we use on PCs, for simplicity and performance. (Sorry
/netbsd-current/external/gpl3/gdb.old/dist/sim/testsuite/sim/bpf/
H A Dldabs.s7 ;;; kernel socket data from BPF programs for high performance filters.
/netbsd-current/external/gpl3/gdb/dist/sim/testsuite/bpf/
H A Dldabs.s7 ;;; kernel socket data from BPF programs for high performance filters.
/netbsd-current/external/lgpl3/gmp/dist/mpn/arm/v7a/cora15/
H A Dmul_1.asm43 C it is possible to get good A9 performance as well, but at the cost of using
/netbsd-current/sys/external/bsd/compiler_rt/dist/lib/sanitizer_common/
H A Dsanitizer_malloc_mac.inc332 // Ok to use internal_memset, these places are not performance-critical.
/netbsd-current/external/gpl3/gcc.old/dist/libsanitizer/sanitizer_common/
H A Dsanitizer_malloc_mac.inc305 // Ok to use internal_memset, these places are not performance-critical.
/netbsd-current/external/gpl3/gcc.old/dist/libphobos/src/std/datetime/
H A Dpackage.d181 This class uses a high-performance counter. On Windows systems, it uses
500 This returns the evaluation value of performance as the ratio of
501 baseFunc's time over targetFunc's time. If performance is high, this
/netbsd-current/external/gpl3/gcc/dist/libsanitizer/sanitizer_common/
H A Dsanitizer_malloc_mac.inc367 // Ok to use internal_memset, these places are not performance-critical.
/netbsd-current/external/lgpl3/gmp/dist/mpn/arm/neon/
H A Dhamdist.asm45 C * Arrange to align the pointer, if that helps performance. Use the same
46 C read-and-mask trick we use on PCs, for simplicity and performance. (Sorry

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