Searched refs:p0 (Results 1 - 25 of 647) sorted by relevance

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/netbsd-current/external/gpl3/gdb.old/dist/gas/testsuite/gas/arm/
H A Dpr18256.s1 LDC p0, c0, =.
H A Dcde-mve.s3 vcx1 p0, q0, #0
4 vcx1 p0, q0, #2048
5 vcx1 p0, q0, #1920
6 vcx1 p0, q0, #64
7 vcx1 p0, q0, #63
9 vcx1 p0, q7, #0
10 vcx1a p0, q0, #0
11 vcx1a p0, q0, #2048
12 vcx1a p0, q0, #1920
13 vcx1a p0, q
[all...]
H A Dcde-mve-or-neon.s2 vcx1 p0, s0, #0
3 vcx1 p0, s0, #1920
4 vcx1 p0, s0, #64
5 vcx1 p0, s0, #63
7 vcx1 p0, s1, #0
8 vcx1 p0, s30, #0
9 vcx1 p0, d0, #0
10 vcx1 p0, d0, #1920
11 vcx1 p0, d0, #64
12 vcx1 p0, d
[all...]
H A Dcde-warnings.s12 cx1 p0, r0, #8192
13 cx1a p0, r0, #8192
14 cx1 p0, r0, #-1
15 cx1a p0, r0, #-1
20 cx1 p0, r16, #0
21 cx1a p0, r16, #0
23 cx1 p0, r13, #0
24 cx1a p0, r13, #0
27 cx1 p0, r0, #0
28 cx1ne p0, r
[all...]
H A Ddest-unpredictable.s6 mrrc p0,#1,r1,r1,c4 @ unpredictable
7 mrrc2 p0,#1,r1,r1,c4 @ ditto
10 mrrc p0,#1,r1,r2,c4 @ predictable
11 mrrc2 p0,#1,r1,r2,c4 @ ditto
12 mcrr p0,#1,r1,r2,c4 @ ditto
13 mcrr2 p0,#1,r1,r2,c4 @ ditto
14 mcrr p0,#1,r1,r1,c4 @ ditto
15 mcrr2 p0,#1,r1,r1,c4 @ ditto
20 mrrc p0,#1,r1,r1,c4 @ unpredictable
21 mrrc2 p0,#
[all...]
H A Dpr18256.l2 [^:]*:1: Error: invalid co-processor operand -- `ldc p0,c0,=.'
H A Dcde-scalar.d8 *[0-9a-f]+: ee00 0000 cx1 p0, r0, #0
9 *[0-9a-f]+: ee3f 0000 cx1 p0, r0, #8064
10 *[0-9a-f]+: ee00 0080 cx1 p0, r0, #64
11 *[0-9a-f]+: ee00 003f cx1 p0, r0, #63
13 *[0-9a-f]+: ee00 f000 cx1 p0, APSR_nzcv, #0
14 *[0-9a-f]+: ee00 9000 cx1 p0, r9, #0
15 *[0-9a-f]+: fe00 0000 cx1a p0, r0, #0
16 *[0-9a-f]+: fe3f 0000 cx1a p0, r0, #8064
17 *[0-9a-f]+: fe00 0080 cx1a p0, r0, #64
18 *[0-9a-f]+: fe00 003f cx1a p0, r
[all...]
H A Dcde.d10 *[0-9a-f]+: ee00 0000 cx1 p0, r0, #0
11 *[0-9a-f]+: ee3f 0000 cx1 p0, r0, #8064
12 *[0-9a-f]+: ee00 0080 cx1 p0, r0, #64
13 *[0-9a-f]+: ee00 003f cx1 p0, r0, #63
15 *[0-9a-f]+: ee00 f000 cx1 p0, APSR_nzcv, #0
16 *[0-9a-f]+: ee00 9000 cx1 p0, r9, #0
17 *[0-9a-f]+: fe00 0000 cx1a p0, r0, #0
18 *[0-9a-f]+: fe3f 0000 cx1a p0, r0, #8064
19 *[0-9a-f]+: fe00 0080 cx1a p0, r0, #64
20 *[0-9a-f]+: fe00 003f cx1a p0, r
[all...]
H A Dcde-missing-mve.l2 [^ :]+:[0-9]+: Error: MVE vector register expected -- `vcx1 p0,q0,#0'
3 [^ :]+:[0-9]+: Error: MVE vector register expected -- `vcx1 p0,q0,#2048'
4 [^ :]+:[0-9]+: Error: MVE vector register expected -- `vcx1 p0,q0,#1920'
5 [^ :]+:[0-9]+: Error: MVE vector register expected -- `vcx1 p0,q0,#64'
6 [^ :]+:[0-9]+: Error: MVE vector register expected -- `vcx1 p0,q0,#63'
8 [^ :]+:[0-9]+: Error: MVE vector register expected -- `vcx1 p0,q7,#0'
9 [^ :]+:[0-9]+: Error: MVE vector register expected -- `vcx1a p0,q0,#0'
10 [^ :]+:[0-9]+: Error: MVE vector register expected -- `vcx1a p0,q0,#2048'
11 [^ :]+:[0-9]+: Error: MVE vector register expected -- `vcx1a p0,q0,#1920'
12 [^ :]+:[0-9]+: Error: MVE vector register expected -- `vcx1a p0,q
[all...]
/netbsd-current/external/gpl3/gdb.old/dist/sim/testsuite/sim/bfin/
H A Dbrcc.s11 loadsym p0, foo;
12 p1 = p0;
20 [p0++] = p0;
21 [p0++] = p0;
22 r7 = p0;
33 [p0++] = p0;
34 [p0
[all...]
H A Dc_mmr_interr_ctl.s24 imm32 p0, 0xFFE02000;
26 [p0++] = r0;
29 [p0++] = r0;
32 [p0++] = r0;
35 [p0++] = r0;
37 [p0++] = r0; // EVT4 not used global Interr Enable (INT4)
40 [p0++] = r0;
43 [p0++] = r0;
46 [p0++] = r0;
49 [p0
[all...]
H A Dedn_snafu.s10 p0 = r7; define
15 [p0++]=r0;
16 [p0++]=r0;
18 [p0++]=r0;
20 p0 = r7; define
26 _dbg p0;
27 r1=b[p0++] (z);
35 r1=b[p0++](z);
36 r1=p0;
H A Dwtf.s6 loadsym p0, foo;
7 r2 = p0;
9 [p0++]=p0;
/netbsd-current/external/gpl3/gdb/dist/sim/testsuite/bfin/
H A Dbrcc.s11 loadsym p0, foo;
12 p1 = p0;
20 [p0++] = p0;
21 [p0++] = p0;
22 r7 = p0;
33 [p0++] = p0;
34 [p0
[all...]
H A Dc_mmr_interr_ctl.s24 imm32 p0, 0xFFE02000;
26 [p0++] = r0;
29 [p0++] = r0;
32 [p0++] = r0;
35 [p0++] = r0;
37 [p0++] = r0; // EVT4 not used global Interr Enable (INT4)
40 [p0++] = r0;
43 [p0++] = r0;
46 [p0++] = r0;
49 [p0
[all...]
H A Dedn_snafu.s10 p0 = r7; define
15 [p0++]=r0;
16 [p0++]=r0;
18 [p0++]=r0;
20 p0 = r7; define
26 _dbg p0;
27 r1=b[p0++] (z);
35 r1=b[p0++](z);
36 r1=p0;
H A Dwtf.s6 loadsym p0, foo;
7 r2 = p0;
9 [p0++]=p0;
/netbsd-current/external/gpl3/gdb.old/dist/gas/testsuite/gas/bfin/
H A Dloop_label.s2 p0 = 15; define
4 loop 1f lc0=p0;
H A Dloop_label2.s2 p0 = 15; define
4 loop .Lfoo lc0=p0;
/netbsd-current/external/gpl3/gdb.old/dist/gas/testsuite/gas/aarch64/
H A Dsve-movprfx_11.s7 ptrue p0.s
9 neg z1.d, p0/m, z2.d
H A Dsve-movprfx_2.s7 ptrue p0.s
9 neg z2.s, p0/m, z2.s
H A Dsve-movprfx_3.s7 ptrue p0.s
9 neg z1.s, p0/m, z1.s
/netbsd-current/external/lgpl3/gmp/dist/mpn/cray/cfp/
H A Dmul_1.c37 mp_limb_t p0[n], p1[n]; local
40 GMPN_MULWW (p1, p0, up, &n, &limb);
41 rp[0] = p0[0];
44 cy_limb += mpn_add_n (rp + 1, p0 + 1, p1, n - 1);
/netbsd-current/external/lgpl3/gmp/dist/mpn/generic/
H A Dbdiv_dbm1c.c43 mp_limb_t a, p0, p1, cy; local
49 umul_ppmm (p1, p0, a, bd << GMP_NAIL_BITS);
50 p0 >>= GMP_NAIL_BITS;
51 cy = h < p0;
52 h = (h - p0) & GMP_NUMB_MASK;
H A Dpopham.c52 mp_limb_t p0, p1, p2, p3, x, p01, p23; variable
60 p0 = POPHAM (up[0], vp[0]);
61 p0 -= (p0 >> 1) & MP_LIMB_T_MAX/3; /* 2 0-2 */
62 p0 = ((p0 >> 2) & MP_LIMB_T_MAX/5) + (p0 & MP_LIMB_T_MAX/5); /* 4 0-4 */
68 p01 = p0 + p1; /* 8 0-8 */
103 p0 = POPHAM (up[0], vp[0]);
104 p0
[all...]

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