Searched refs:op2 (Results 1 - 25 of 549) sorted by relevance

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/netbsd-current/external/gpl3/gdb.old/dist/gas/testsuite/gas/arm/
H A Dmve-vctp.s5 .irp op2 8, 16, 32, 64
6 vctp.\op2 \op1
11 .irp op2 8, 16, 32, 64
13 vctpt.\op2 \op1
H A Dmve-vrev.s5 .irp op2, q0, q1, q2, q4, q7
6 vrev16.8 \op1, \op2
8 vrev32.\data \op1, \op2
14 .irp op2, q1, q2, q4, q7
15 vrev64.\data q0, \op2
19 .irp op2, q0, q2, q4, q7
20 vrev64.\data q1, \op2
24 .irp op2, q0, q1, q4, q7
25 vrev64.\data q2, \op2
29 .irp op2, q
[all...]
H A Dmve-vctp-bad.s5 .irp op2 8, 16, 32, 64, s8, u16, f32
6 vctp.\op2 \op1
11 .irp op2 8, 16, 32, 64, f32
12 vctpt.\op2 \op1
H A Dmve-vstld.s7 .irp op2, r0, r1, r2, r4, r7, r8, r10, r12, r13, r14
8 \op\()\part\()\size {q0, q1}, [\op2]
9 \op\()\part\()\size {q1, q2}, [\op2]
10 \op\()\part\()\size {q2, q3}, [\op2]
11 \op\()\part\()\size {q3, q4}, [\op2]
12 \op\()\part\()\size {q4, q5}, [\op2]
13 \op\()\part\()\size {q5, q6}, [\op2]
14 \op\()\part\()\size {q6, q7}, [\op2]
16 .irp op2, r0, r1, r2, r4, r7, r8, r10, r12, r14
17 \op\()\part\()\size {q0, q1}, [\op2]!
[all...]
H A Dmve-vqshl.s5 .irp op2, r0, r1, r2, r4, r7, r8, r10, r12, r14
6 vqshl.\data \op1, \op2
8 .irp op2, q0, q1, q2, q4, q7
10 vqshl.\data \op1, \op2, \op3
17 .irp op2, q0, q1, q2, q4, q7
19 vqshl.u8 \op1, \op2, \op3
20 vqshl.s8 \op1, \op2, \op3
21 vqshlu.s8 \op1, \op2, \op3
24 vqshl.u16 \op1, \op2, \op3
25 vqshl.s16 \op1, \op2, \op
[all...]
H A Dmve-vhcadd.s5 .irp op2, q0, q1, q2, q4, q7
8 vhcadd.\data \op1, \op2, \op3, \rot
15 .macro vhcadd_q0 op2, rot
17 vhcadd.s32 q0, \op2, \op3, \rot
21 .macro vhcadd_q1 op2, rot
23 vhcadd.s32 q1, \op2, \op3, \rot
27 .macro vhcadd_q2 op2, rot
29 vhcadd.s32 q2, \op2, \op3, \rot
33 .macro vhcadd_q4 op2, rot
35 vhcadd.s32 q4, \op2, \op
[all...]
H A Dmve-vqdmull.s5 .irp op2, q0, q1, q2, q4, q7
7 vqdmullt.s16 \op1, \op2, \op3
8 vqdmullb.s16 \op1, \op2, \op3
13 .irp op2, q1, q2, q4, q7
15 vqdmullt.s32 q0, \op2, \op3
16 vqdmullb.s32 q0, \op2, \op3
20 .irp op2, q0, q2, q4, q7
22 vqdmullt.s32 q1, \op2, \op3
23 vqdmullb.s32 q1, \op2, \op3
27 .irp op2, q
[all...]
H A Dmve-vqrshrn.s5 .irp op2, q0, q1, q2, q4, q7
8 vqrshrnt.\data \op1, \op2, \op3
9 vqrshrnb.\data \op1, \op2, \op3
11 vqrshrunt.s16 \op1, \op2, \op3
12 vqrshrunb.s16 \op1, \op2, \op3
17 .irp op2, q0, q1, q2, q4, q7
20 vqrshrnt.\data \op1, \op2, \op3
21 vqrshrnb.\data \op1, \op2, \op3
23 vqrshrunt.s32 \op1, \op2, \op3
24 vqrshrunb.s32 \op1, \op2, \op
[all...]
H A Dmve-vcadd.s5 .irp op2, q0, q1, q2, q4, q7
8 vcadd.\data \op1, \op2, \op3, \op4
15 .macro vcadd_q0 data, op2, op4
17 vcadd.\data q0, \op2, \op3, \op4
21 .macro vcadd_q1 data, op2, op4
23 vcadd.\data q1, \op2, \op3, \op4
27 .macro vcadd_q2 data, op2, op4
29 vcadd.\data q2, \op2, \op3, \op4
33 .macro vcadd_q3 data, op2, op4
35 vcadd.\data q3, \op2, \op
[all...]
H A Dmve-vshll.s4 .irp op2, q0, q1, q2, q4, q7
6 vshllt.s8 \op1, \op2, \op3
7 vshllt.u8 \op1, \op2, \op3
8 vshllb.s8 \op1, \op2, \op3
9 vshllb.u8 \op1, \op2, \op3
12 vshllt.s16 \op1, \op2, \op3
13 vshllt.u16 \op1, \op2, \op3
14 vshllb.s16 \op1, \op2, \op3
15 vshllb.u16 \op1, \op2, \op3
H A Dmve-vshrn.s4 .irp op2, q0, q1, q2, q4, q7
6 vshrnt.i16 \op1, \op2, \op3
7 vshrnb.i16 \op1, \op2, \op3
8 vrshrnt.i16 \op1, \op2, \op3
9 vrshrnb.i16 \op1, \op2, \op3
12 vshrnt.i32 \op1, \op2, \op3
13 vshrnb.i32 \op1, \op2, \op3
14 vrshrnt.i32 \op1, \op2, \op3
15 vrshrnb.i32 \op1, \op2, \op3
H A Dmve-vsli.s4 .irp op2, q0, q1, q2, q4, q7
6 vsli.8 \op1, \op2, \op3
9 vsli.16 \op1, \op2, \op3
12 vsli.32 \op1, \op2, \op3
H A Dmve-vsri.s4 .irp op2, q0, q1, q2, q4, q7
6 vsri.8 \op1, \op2, \op3
9 vsri.16 \op1, \op2, \op3
12 vsri.32 \op1, \op2, \op3
H A Dmve-vqdmladh.s6 .irp op2, q0, q1, q2, q4, q7
8 vqdmladh.\data \op1, \op2, \op3
9 vqdmladhx.\data \op1, \op2, \op3
10 vqrdmladh.\data \op1, \op2, \op3
11 vqrdmladhx.\data \op1, \op2, \op3
17 .irp op2, q1, q2, q4, q7
19 vqdmladh.s32 q0, \op2, \op3
20 vqdmladhx.s32 q0, \op2, \op3
21 vqrdmladh.s32 q0, \op2, \op3
22 vqrdmladhx.s32 q0, \op2, \op
[all...]
H A Dmve-vqdmlsdh.s5 .irp op2, q0, q1, q2, q4, q7
7 vqdmlsdh.\data \op1, \op2, \op3
8 vqdmlsdhx.\data \op1, \op2, \op3
9 vqrdmlsdh.\data \op1, \op2, \op3
10 vqrdmlsdhx.\data \op1, \op2, \op3
16 .irp op2, q1, q2, q4, q7
18 vqdmlsdh.s32 q0, \op2, \op3
19 vqdmlsdhx.s32 q0, \op2, \op3
20 vqrdmlsdh.s32 q0, \op2, \op3
21 vqrdmlsdhx.s32 q0, \op2, \op
[all...]
H A Dmve-vshl.s4 .irp op2, q0, q1, q2, q4, q7
6 vshl.i8 \op1, \op2, \op3
9 vshl.i16 \op1, \op2, \op3
12 vshl.i32 \op1, \op2, \op3
19 .irp op2, q0, q1, q2, q4, q7
21 vshl.\data \op1, \op2, \op3
24 .irp op2, r0, r1, r2, r4, r7, r8, r10, r12, r14
25 vshl.\data \op1, \op2
/netbsd-current/external/mit/isl/dist/
H A Disl_imath.h7 void isl_imath_addmul_ui(mp_int rop, mp_int op1, unsigned long op2);
8 void isl_imath_submul_ui(mp_int rop, mp_int op1, unsigned long op2);
9 void isl_imath_cdiv_q_ui(mp_int rop, mp_int op1, unsigned long op2);
10 void isl_imath_fdiv_q_ui(mp_int rop, mp_int op1, unsigned long op2);
/netbsd-current/external/lgpl3/gmp/dist/tests/mpz/
H A Ddive.c29 mpz_t op1, op2; local
48 mpz_init (op2);
65 mpz_rrandomb (op2, rands, size);
67 while (mpz_sgn (op2) == 0);
74 mpz_neg (op2, op2);
76 mpz_mul (prod, op1, op2);
78 mpz_divexact (quot, prod, op2);
87 mpz_trace (" divisor ", op2);
94 mpz_clear (op2);
[all...]
H A Dt-addsub.c33 mpz_t op1, op2, r1, r2; local
51 mpz_init (op2);
66 mpz_rrandomb (op2, rands, op2n);
73 mpz_neg (op2, op2);
77 mpz_add (r1, op1, op2);
78 mpz_sub (r2, r1, op2);
80 dump_abort (i, "mpz_add or mpz_sub incorrect", op1, op2);
82 if (mpz_fits_ulong_p (op2))
84 op2long = mpz_get_ui (op2);
109 dump_abort(int i, const char *s, mpz_t op1, mpz_t op2) argument
[all...]
/netbsd-current/sys/arch/i386/i386/
H A Ddb_disasm.c112 #define op2(x,y) ((x)|((y)<<8)) macro
136 { "sidt", false, NONE, op2(MEx,4), "monitor\0mwait\0clac\0stac"},
137 { "lgdt", false, NONE, op2(MEx,2), "xgetbv\0xsetbv" },
142 { "invlpg", false, NONE, op2(MEx,2), "swapgs\0rdtscp" },
162 { "xrstor", false, NONE, op2(MEx,1), "lfence" },
163 { "xsaveopt", false, NONE, op2(MEx,1), "mfence" },
164 { "clflush", false, NONE, op2(MEx,1), "sfence" },
185 /*02*/ { "lar", true, LONG, op2(E,R), 0 },
186 /*03*/ { "lsl", true, LONG, op2(E,R), 0 },
203 /*20*/ { "mov", true, LONG, op2(C
[all...]
/netbsd-current/sys/arch/amd64/amd64/
H A Ddb_disasm.c129 #define op2(x,y) ((x)|((y)<<8)) macro
198 /*02*/ { "lar", true, LONG, op2(E,R), 0 },
199 /*03*/ { "lsl", true, LONG, op2(E,R), 0 },
210 /*0d*/ { "prefetch",true,NONE, op2(E,R), 0 }, /* Not 'R' really */
236 /*20*/ { "mov", true, LONG, op2(CR,E), 0 }, /* use E for reg */
237 /*21*/ { "mov", true, LONG, op2(DR,E), 0 }, /* since mod == 11 */
238 /*22*/ { "mov", true, LONG, op2(E,CR), 0 },
239 /*23*/ { "mov", true, LONG, op2(E,DR), 0 },
240 /*24*/ { "mov", true, LONG, op2(TR,E), 0 },
242 /*26*/ { "mov", true, LONG, op2(
[all...]
/netbsd-current/external/lgpl3/gmp/dist/mpq/
H A Dequal.c35 mpq_equal (mpq_srcptr op1, mpq_srcptr op2) __GMP_NOTHROW
42 ASSERT_MPQ_CANONICAL (op2); variable
45 num2_size = SIZ(NUM(op2));
50 den2_size = SIZ(DEN(op2));
55 num2_ptr = PTR(NUM(op2));
62 den2_ptr = PTR(DEN(op2));
H A Daors.c39 mpq_aors (mpq_ptr rop, mpq_srcptr op1, mpq_srcptr op2, argument
46 mp_size_t op2_num_size = ABSIZ(NUM(op2));
47 mp_size_t op2_den_size = SIZ(DEN(op2));
60 mpz_gcd (gcd, DEN(op1), DEN(op2));
68 mpz_divexact_gcd (t, DEN(op2), gcd);
72 mpz_mul (t, NUM(op2), tmp2);
80 mpz_mul (DEN(rop), DEN(op2), tmp2);
85 mpz_divexact_gcd (tmp1, DEN(op2), gcd);
93 mpz_mul (tmp1, NUM(op1), DEN(op2));
94 mpz_mul (tmp2, NUM(op2), DE
103 mpq_add(mpq_ptr rop, mpq_srcptr op1, mpq_srcptr op2) argument
109 mpq_sub(mpq_ptr rop, mpq_srcptr op1, mpq_srcptr op2) argument
[all...]
/netbsd-current/external/gpl3/gdb.old/dist/gas/testsuite/gas/aarch64/
H A Dldst-reg-uns-imm.s37 .macro op2 op, reg, simm
45 op2 \op\suffix, \reg, \simm
49 op2 \op\suffix, \reg, \simm
51 op2 \op\suffix, \reg, "(4095*\size)"
58 op2 \op, \reg, \simm
62 op2 \op, \reg, \simm
65 op2 \op, \reg, 4095
68 op2 \op, \reg, 8190
71 op2 \op, \reg, 16380
74 op2 \o
[all...]
/netbsd-current/external/lgpl3/mpc/dist/src/
H A Dadd_si.c24 mpc_add_si (mpc_ptr rop, mpc_srcptr op1, long int op2, mpc_rnd_t rnd) argument
28 inex_re = mpfr_add_si (mpc_realref (rop), mpc_realref (op1), op2, MPC_RND_RE (rnd));

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