Searched refs:mmUVD_VCPU_NONCACHE_OFFSET0 (Results 1 - 4 of 4) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/vcn/
H A Dvcn_2_0_0_offset.h652 #define mmUVD_VCPU_NONCACHE_OFFSET0 0x0254 macro
H A Dvcn_2_5_offset.h723 #define mmUVD_VCPU_NONCACHE_OFFSET0 0x0152 macro
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
H A Damdgpu_vcn_v2_0.c437 UVD, 0, mmUVD_VCPU_NONCACHE_OFFSET0), 0, 0, indirect);
H A Damdgpu_vcn_v2_5.c520 UVD, 0, mmUVD_VCPU_NONCACHE_OFFSET0), 0, 0, indirect);

Completed in 195 milliseconds