Searched refs:mmUVD_SCRATCH9 (Results 1 - 6 of 6) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_offset.h62 #define mmUVD_SCRATCH9 0x00dd macro
H A Dvcn_2_0_0_offset.h420 #define mmUVD_SCRATCH9 0x001d macro
H A Dvcn_2_5_offset.h435 #define mmUVD_SCRATCH9 0x001d macro
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
H A Damdgpu_vcn_v1_0.c142 SOC15_REG_OFFSET(UVD, 0, mmUVD_SCRATCH9);
H A Damdgpu_vcn_v2_0.c151 adev->vcn.inst->external.scratch9 = SOC15_REG_OFFSET(UVD, 0, mmUVD_SCRATCH9);
H A Damdgpu_vcn_v2_5.c184 adev->vcn.inst[j].external.scratch9 = SOC15_REG_OFFSET(UVD, j, mmUVD_SCRATCH9);

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