Searched refs:mmUVD_RB_BASE_HI4 (Results 1 - 3 of 3) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_offset.h416 #define mmUVD_RB_BASE_HI4 0x05e0 macro
H A Dvcn_2_0_0_offset.h766 #define mmUVD_RB_BASE_HI4 0x02a0 macro
H A Dvcn_2_5_offset.h585 #define mmUVD_RB_BASE_HI4 0x00ba macro

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