Searched refs:mmUVD_LMI_VCPU_NC0_64BIT_BAR_LOW (Results 1 - 4 of 4) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/vcn/
H A Dvcn_2_0_0_offset.h954 #define mmUVD_LMI_VCPU_NC0_64BIT_BAR_LOW 0x0623 macro
H A Dvcn_2_5_offset.h859 #define mmUVD_LMI_VCPU_NC0_64BIT_BAR_LOW 0x0438 macro
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
H A Damdgpu_vcn_v2_0.c433 UVD, 0, mmUVD_LMI_VCPU_NC0_64BIT_BAR_LOW), 0, 0, indirect);
H A Damdgpu_vcn_v2_5.c516 UVD, 0, mmUVD_LMI_VCPU_NC0_64BIT_BAR_LOW), 0, 0, indirect);

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