Searched refs:mmUVD_LMI_RBC_RB_64BIT_BAR_LOW (Results 1 - 12 of 12) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/uvd/
H A Duvd_6_0_d.h51 #define mmUVD_LMI_RBC_RB_64BIT_BAR_LOW 0x3c69 macro
H A Duvd_5_0_d.h40 #define mmUVD_LMI_RBC_RB_64BIT_BAR_LOW 0x3c69 macro
H A Duvd_7_0_offset.h118 #define mmUVD_LMI_RBC_RB_64BIT_BAR_LOW 0x0469 macro
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_offset.h244 #define mmUVD_LMI_RBC_RB_64BIT_BAR_LOW 0x0469 macro
H A Dvcn_2_0_0_offset.h962 #define mmUVD_LMI_RBC_RB_64BIT_BAR_LOW 0x0629 macro
H A Dvcn_2_5_offset.h851 #define mmUVD_LMI_RBC_RB_64BIT_BAR_LOW 0x0432 macro
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
H A Damdgpu_vcn_v2_5.c872 WREG32_SOC15(UVD, inst_idx, mmUVD_LMI_RBC_RB_64BIT_BAR_LOW,
1045 WREG32_SOC15(UVD, i, mmUVD_LMI_RBC_RB_64BIT_BAR_LOW,
1242 mmUVD_LMI_RBC_RB_64BIT_BAR_LOW),
H A Damdgpu_uvd_v5_0.c415 WREG32(mmUVD_LMI_RBC_RB_64BIT_BAR_LOW,
H A Damdgpu_vcn_v1_0.c923 WREG32_SOC15(UVD, 0, mmUVD_LMI_RBC_RB_64BIT_BAR_LOW,
1081 WREG32_SOC15(UVD, 0, mmUVD_LMI_RBC_RB_64BIT_BAR_LOW,
H A Damdgpu_vcn_v2_0.c859 WREG32_SOC15(UVD, 0, mmUVD_LMI_RBC_RB_64BIT_BAR_LOW,
1013 WREG32_SOC15(UVD, 0, mmUVD_LMI_RBC_RB_64BIT_BAR_LOW,
H A Damdgpu_uvd_v6_0.c832 WREG32(mmUVD_LMI_RBC_RB_64BIT_BAR_LOW,
H A Damdgpu_uvd_v7_0.c1085 WREG32_SOC15(UVD, k, mmUVD_LMI_RBC_RB_64BIT_BAR_LOW,

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