Searched refs:mmUVD_GP_SCRATCH8 (Results 1 - 8 of 8) sorted by relevance
| /netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/uvd/ |
| H A D | uvd_6_0_d.h | 132 #define mmUVD_GP_SCRATCH8 0x3c0a macro
|
| H A D | uvd_7_0_offset.h | 84 #define mmUVD_GP_SCRATCH8 0x040a macro
|
| /netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/vcn/ |
| H A D | vcn_1_0_offset.h | 176 #define mmUVD_GP_SCRATCH8 0x040a macro
|
| H A D | vcn_2_0_0_offset.h | 874 #define mmUVD_GP_SCRATCH8 0x05ca macro
|
| H A D | vcn_2_5_offset.h | 651 #define mmUVD_GP_SCRATCH8 0x00e6 macro
|
| /netbsd-current/sys/external/bsd/drm2/dist/drm/amd/amdgpu/ |
| H A D | amdgpu_uvd_v6_0.c | 1056 amdgpu_ring_write(ring, PACKET0(mmUVD_GP_SCRATCH8, 0));
1071 amdgpu_ring_write(ring, PACKET0(mmUVD_GP_SCRATCH8, 0));
|
| H A D | amdgpu_vcn_v1_0.c | 1536 PACKET0(SOC15_REG_OFFSET(UVD, 0, mmUVD_GP_SCRATCH8), 0));
|
| H A D | amdgpu_uvd_v7_0.c | 1370 PACKET0(SOC15_REG_OFFSET(UVD, ring->me, mmUVD_GP_SCRATCH8), 0));
|
Completed in 185 milliseconds