Searched refs:mmUVD_GP_SCRATCH1_BASE_IDX (Results 1 - 3 of 3) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_offset.h315 #define mmUVD_GP_SCRATCH1_BASE_IDX 1 macro
H A Dvcn_2_0_0_offset.h523 #define mmUVD_GP_SCRATCH1_BASE_IDX 1 macro
H A Dvcn_2_5_offset.h638 #define mmUVD_GP_SCRATCH1_BASE_IDX 1 macro

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