Searched refs:mmUVD_CXW_WR_INT_CTX_ID (Results 1 - 2 of 2) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/vcn/
H A Dvcn_2_0_0_offset.h516 #define mmUVD_CXW_WR_INT_CTX_ID 0x01ef macro
H A Dvcn_2_5_offset.h613 #define mmUVD_CXW_WR_INT_CTX_ID 0x00cb macro

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