Searched refs:mmTD_EDC_CNT (Results 1 - 6 of 6) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
H A Dgc_9_4_1_offset.h197 #define mmTD_EDC_CNT 0x052e macro
H A Dgc_9_0_offset.h834 #define mmTD_EDC_CNT 0x052e macro
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
H A Damdgpu_gfx_v9_4.c88 { SOC15_REG_ENTRY(GC, 0, mmTD_EDC_CNT), 0, 4, 16 },
424 { "TD_SS_FIFO_LO", SOC15_REG_ENTRY(GC, 0, mmTD_EDC_CNT),
427 { "TD_SS_FIFO_HI", SOC15_REG_ENTRY(GC, 0, mmTD_EDC_CNT),
430 { "TD_CS_FIFO", SOC15_REG_ENTRY(GC, 0, mmTD_EDC_CNT),
H A Damdgpu_gfx_v9_0.c4138 { SOC15_REG_ENTRY(GC, 0, mmTD_EDC_CNT), 0, 4, 16},
5863 { "TD_SS_FIFO_LO", SOC15_REG_ENTRY(GC, 0, mmTD_EDC_CNT),
5867 { "TD_SS_FIFO_HI", SOC15_REG_ENTRY(GC, 0, mmTD_EDC_CNT),
5871 { "TD_CS_FIFO", SOC15_REG_ENTRY(GC, 0, mmTD_EDC_CNT),
H A Damdgpu_gfx_v8_0.c1519 mmTD_EDC_CNT
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/
H A Dgfx_8_0_d.h2814 #define mmTD_EDC_CNT 0x252e macro

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