Searched refs:mmSDMA1_RLC0_RB_WPTR (Results 1 - 8 of 8) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/sdma1/
H A Dsdma1_4_0_offset.h382 #define mmSDMA1_RLC0_RB_WPTR 0x0145 macro
H A Dsdma1_4_2_2_offset.h382 #define mmSDMA1_RLC0_RB_WPTR 0x0135 macro
H A Dsdma1_4_2_offset.h378 #define mmSDMA1_RLC0_RB_WPTR 0x0145 macro
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/oss/
H A Doss_2_4_d.h329 #define mmSDMA1_RLC0_RB_WPTR 0x3704 macro
H A Doss_2_0_d.h365 #define mmSDMA1_RLC0_RB_WPTR 0x3704 macro
H A Doss_3_0_1_d.h430 #define mmSDMA1_RLC0_RB_WPTR 0x3704 macro
H A Doss_3_0_d.h531 #define mmSDMA1_RLC0_RB_WPTR 0x3704 macro
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
H A Dgc_10_1_0_offset.h1378 #define mmSDMA1_RLC0_RB_WPTR 0x0745 macro
[all...]

Completed in 408 milliseconds