Searched refs:mmSDMA1_RLC0_IB_CNTL (Results 1 - 11 of 11) sorted by relevance
| /netbsd-current/sys/external/bsd/drm2/dist/drm/amd/amdgpu/ |
| H A D | amdgpu_mxgpu_vi.c | 116 mmSDMA1_RLC0_IB_CNTL, 0x800f0111, 0x00000100,
256 mmSDMA1_RLC0_IB_CNTL, 0x800f0111, 0x00000100,
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| H A D | amdgpu_sdma_v3_0.c | 96 mmSDMA1_RLC0_IB_CNTL, 0x800f0111, 0x00000100,
114 mmSDMA1_RLC0_IB_CNTL, 0x800f0111, 0x00000100,
134 mmSDMA1_RLC0_IB_CNTL, 0x800f0111, 0x00000100,
148 mmSDMA1_RLC0_IB_CNTL, 0x800f0111, 0x00000100,
164 mmSDMA1_RLC0_IB_CNTL, 0x00000100, 0x00000100,
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| H A D | amdgpu_sdma_v4_0.c | 114 SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_RLC0_IB_CNTL, 0x800f0100, 0x00000100),
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| /netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/sdma1/ |
| H A D | sdma1_4_0_offset.h | 392 #define mmSDMA1_RLC0_IB_CNTL 0x014a macro
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| H A D | sdma1_4_2_2_offset.h | 392 #define mmSDMA1_RLC0_IB_CNTL 0x013a macro
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| H A D | sdma1_4_2_offset.h | 388 #define mmSDMA1_RLC0_IB_CNTL 0x014a macro
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| /netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/oss/ |
| H A D | oss_2_4_d.h | 335 #define mmSDMA1_RLC0_IB_CNTL 0x370a macro
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| H A D | oss_2_0_d.h | 371 #define mmSDMA1_RLC0_IB_CNTL 0x370a macro
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| H A D | oss_3_0_1_d.h | 436 #define mmSDMA1_RLC0_IB_CNTL 0x370a macro
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| H A D | oss_3_0_d.h | 537 #define mmSDMA1_RLC0_IB_CNTL 0x370a macro
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| /netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/ |
| H A D | gc_10_1_0_offset.h | 1388 #define mmSDMA1_RLC0_IB_CNTL 0x074a macro
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