Searched refs:mmSDMA0_RLC5_WATERMARK (Results 1 - 3 of 3) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/sdma0/
H A Dsdma0_4_2_2_offset.h842 #define mmSDMA0_RLC5_WATERMARK 0x0312 macro
H A Dsdma0_4_2_offset.h838 #define mmSDMA0_RLC5_WATERMARK 0x034a macro
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
H A Dgc_10_1_0_offset.h825 #define mmSDMA0_RLC5_WATERMARK 0x034a macro
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