Searched refs:mmSDMA0_RLC5_RB_WPTR_POLL_ADDR_HI (Results 1 - 3 of 3) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/sdma0/
H A Dsdma0_4_2_2_offset.h856 #define mmSDMA0_RLC5_RB_WPTR_POLL_ADDR_HI 0x031a macro
H A Dsdma0_4_2_offset.h852 #define mmSDMA0_RLC5_RB_WPTR_POLL_ADDR_HI 0x0352 macro
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
H A Dgc_10_1_0_offset.h839 #define mmSDMA0_RLC5_RB_WPTR_POLL_ADDR_HI 0x0352 macro
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