Searched refs:mmSDMA0_RLC1_IB_CNTL (Results 1 - 12 of 12) sorted by relevance
| /netbsd-current/sys/external/bsd/drm2/dist/drm/amd/amdgpu/ |
| H A D | amdgpu_sdma_v3_0.c | 92 mmSDMA0_RLC1_IB_CNTL, 0x800f0111, 0x00000100,
111 mmSDMA0_RLC1_IB_CNTL, 0x800f0111, 0x00000100,
130 mmSDMA0_RLC1_IB_CNTL, 0x800f0111, 0x00000100,
144 mmSDMA0_RLC1_IB_CNTL, 0x800f0111, 0x00000100,
159 mmSDMA0_RLC1_IB_CNTL, 0x00000100, 0x00000100,
179 mmSDMA0_RLC1_IB_CNTL, 0x00000100, 0x00000100,
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| H A D | amdgpu_mxgpu_vi.c | 113 mmSDMA0_RLC1_IB_CNTL, 0x800f0111, 0x00000100,
252 mmSDMA0_RLC1_IB_CNTL, 0x800f0111, 0x00000100,
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| H A D | amdgpu_sdma_v4_0.c | 104 SOC15_REG_GOLDEN_VALUE(SDMA0, 0, mmSDMA0_RLC1_IB_CNTL, 0x800f0100, 0x00000100),
146 SOC15_REG_GOLDEN_VALUE(SDMA0, 0, mmSDMA0_RLC1_IB_CNTL, 0x800f0111, 0x00000100),
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| /netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/sdma0/ |
| H A D | sdma0_4_1_offset.h | 396 #define mmSDMA0_RLC1_IB_CNTL 0x01aa macro
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| H A D | sdma0_4_0_offset.h | 484 #define mmSDMA0_RLC1_IB_CNTL 0x01aa macro
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| H A D | sdma0_4_2_2_offset.h | 484 #define mmSDMA0_RLC1_IB_CNTL 0x0192 macro
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| H A D | sdma0_4_2_offset.h | 480 #define mmSDMA0_RLC1_IB_CNTL 0x01aa macro
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| /netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/oss/ |
| H A D | oss_2_4_d.h | 254 #define mmSDMA0_RLC1_IB_CNTL 0x358a macro
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| H A D | oss_2_0_d.h | 303 #define mmSDMA0_RLC1_IB_CNTL 0x358a macro
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| H A D | oss_3_0_1_d.h | 303 #define mmSDMA0_RLC1_IB_CNTL 0x358a macro
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| H A D | oss_3_0_d.h | 422 #define mmSDMA0_RLC1_IB_CNTL 0x358a macro
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| /netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/ |
| H A D | gc_10_1_0_offset.h | 472 #define mmSDMA0_RLC1_IB_CNTL 0x01aa macro
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