Searched refs:mmSDMA0_RLC0_RB_RPTR_HI (Results 1 - 8 of 8) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
H A Damdgpu_amdkfd_arcturus.c169 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_RPTR_HI,
287 RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_RPTR_HI);
H A Damdgpu_amdkfd_gfx_v10.c467 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_RPTR_HI,
715 RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_RPTR_HI);
H A Damdgpu_amdkfd_gfx_v9.c455 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_RPTR_HI,
645 RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_RPTR_HI);
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/sdma0/
H A Dsdma0_4_1_offset.h300 #define mmSDMA0_RLC0_RB_RPTR_HI 0x0144 macro
H A Dsdma0_4_0_offset.h388 #define mmSDMA0_RLC0_RB_RPTR_HI 0x0144 macro
H A Dsdma0_4_2_2_offset.h388 #define mmSDMA0_RLC0_RB_RPTR_HI 0x0134 macro
H A Dsdma0_4_2_offset.h384 #define mmSDMA0_RLC0_RB_RPTR_HI 0x0144 macro
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
H A Dgc_10_1_0_offset.h377 #define mmSDMA0_RLC0_RB_RPTR_HI 0x0144 macro
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